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TM 11-6625-3145-14
Theory of Operation-318/338 Service
QUALIFY LOGIC <5> <6>
The qualify logic circuit consists of A03U 118A, B, A03U1 16A, B. The qualifier signals QA, QB, QA, and QB come from
the A02 Input B board. Their signals are wire-ORed with the outputs of the Qualify Register, A03U106 and A03U108, and
go to the EXOR gates A03U116 and A03U118 <5> where their polarities are selected according to the polarity selection
bits. Each output of the EXOR gates is wire-ANDed and these signals go to gates A03U126A and A03U126B <6> of the
start logic circuit.
START/STOP LOGIC <6>
The start/stop logic circuit consists of A03U124B, A03U126A,B. When data acquisition starts, the START1 pulse is
generated at I/O address 56
hex
and goes to the clock input of A03U124B.
The output signal of this flip-flop enables the trigger qualify and clock qualify signals. These signals pass through gates
A03U126A and A03U126B to the inputs of the trigger qualify and the clock qualify flip-flops.
To read the acquired data from the ACQ memory on the A04 board, START2 is issued at I/O address 55
hex
. START2
enables ADRS CLK, which clocks the memory address counter. At the end of the data acquisition phase, the signal
STOP1 (A03U156A pin 2) is issued by the STOP flag output of A03U158. At the end of the read from ACQ memory
operation, MANUAL STOP is generated at 1/0 address 53
hex
.
TRIGGER QUALIFY FLIP-FLOP <6>
The trigger qualify flip-flop circuit is A03U128A. The TRIG QUAL signal is clocked into the D-type flip-flop from A03U126A
every system clock cycle.
The output of A03U128A connects to one of the retiming flip-flops through delay line A03DL106B.
RETIMING CLOCK <6>
The retiming clock circuit consists of A03U 128B, A03C100, A03R136, A03DL102, A03U 134B, and A03U142C. The
pulse generated by A03U128B, A03C100, and A03R136 is called the retiming clock. This pulse travels through delay line
A03DL102 to the clock pin of A03U134B.
The pulse delay time is adjusted by selecting a tap of A03J200. The pulse is used as the retiming clock which regulates
when trigger data is latched into the retiming flip-flops.
CLOCK QUALIFY FLIP-FLOP <6>
The clock qualify circuit consists of A03U130A, A03DL100A,B, A03U142D, A03R130, and A03C102.
The pulse generated by A03U 130 and A03DL100B travels through A03DL100A and A03U 142D to the clock pins of
A03U130B, A03U132A, and A03U132B as the the trigger pulse for the strobe generators.
STROBE GENERATOR <6>
The strobe generator contains the write enable ( WE ) circuit, the address clock (ADRSCLK) circuit, and the trigger clock
(TRIGCLK1, TRIGCLK2) circuit.
4-12
Содержание 318
Страница 119: ...318 VERIFICATION AND ADJUSTMENT PROCEDURES ...
Страница 182: ...338 VERIFICATION AND ADJUSTMENT PROCEDURES ...
Страница 253: ...318 ___________________ TROUBLESHOOTING TREES ...
Страница 269: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 7 318 Word recognizer test ...
Страница 278: ...TM 11 6625 3145 14 Maintenance Troubleshooting 31 8 338 Service Figure 7 10 318 N and DELAY counter test 7 25 ...
Страница 313: ...TM 11 6625 3145 14 Figure 7 19 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 4 of 6 7 60 ...
Страница 344: ...338 TROUBLESHOOTING TREES ...
Страница 362: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service 4434 567 Figure 7 39 338 Word recognizer test 7 109 ...
Страница 371: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service 4434490 Figure 7 42 338 N and DELAY counter test 7 118 ...
Страница 421: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 55 Troubleshooting Tree 12 T H A01 A02 7 169 ...
Страница 517: ...TM 11 6625 3145 14 318 338 4434 923 318 Block Diagram ...
Страница 518: ...TM 11 6625 3145 14 318 338 4434 924 338 Block Diagram ...
Страница 519: ...TM 11 6625 3145 14 318 338 4434 925 318 Acquisition Module Wiring Diagram ...
Страница 520: ...TM 11 6625 3145 14 318 338 4434 926 318 338 Mainframe Wiring Diagram ...
Страница 521: ...TM 11 6625 3145 14 318 338 4434 926 338 Acquisition Module Wiring Diagram ...
Страница 522: ...TM 11 6625 3145 14 318 338 4434 928 Figure 9 1 318 A01 Input A Board Component Locations ...
Страница 526: ...TM 11 6625 3145 14 ...
Страница 528: ...TM 11 6625 3145 14 Figure 9 3 318 338 A03 ACQ Control Board Component Locations ...
Страница 532: ...TM 11 6625 3145 14 ...
Страница 536: ...TM 11 6625 3145 14 ...
Страница 538: ...TM 11 6625 3145 14 ...
Страница 539: ...TM 11 6625 3145 14 ...
Страница 540: ...TM 11 6625 3145 14 ...
Страница 541: ...TM 11 6625 3145 14 ...
Страница 542: ...TM 11 6625 3145 14 Figure 9 8 318 338 A10 CRT Board Component Locations ...
Страница 544: ...TM 11 6625 3145 14 Figure 9 9 318 338 A11 Inverter Board component Locations ...
Страница 546: ...TM 11 6625 3145 14 Figure 9 10 318 338 A12 Regulator Board Component Locations ...
Страница 548: ...TN 11 6625 3145 14 Figure 9 11 318S1 338S1 A07 Serial RS232 Non Volatile Memory Board Component Locations ...
Страница 551: ...TM 11 6625 3145 14 Figure 9 12 338 A01 Input A Board Component Locations ...
Страница 553: ...TM 11 6625 3145 14 318 338 SERVICE ...
Страница 554: ......
Страница 555: ...PIN 058584 ...