126 Chapter 8 - Modbus RTU Protocol
User Manual
An implemented subset of the MODBUS functions contains:
01
Read Coil Status
02
Read Input Status
03
Read Holding Registers
04
Read Input registers
05
Force Single Coil
06
Preset Single register
07
Read Status
15
Force multiple Coils
16
Preset Multiple Registers
The 01 and 02 functions, so as the 03 and 04 functions, are similar and interchangeable. See chapter 3 for a complete and
detailed description of the functions.
8.3.3 CRC16
The last two characters of the message contain the cyclic redundancy code (Cyclic Redundancy Check) calculated according
to the CRC16 algorithm. As for the calculation of these two characters, the message (address, function code and data
thus rejecting the parity and the start and stop bits) is considered as a single and continuous binary number whose most
significative bit (MSB) is transmitted as first. The message is multiplied by x
16
(it undergoes a 16-bit shift on the left) and
then it is divided by x
16
+x
15
+x
2
+1; it is stated as a binary number (1100000000000101). The integer quotient is rejected and
the 16-bit remainder (it is initialized with FFFFh in order to avoid a zero made message) is added to the sent message. The
obtained message, when the receiver slave has divided it by the same polynomial (x
16
+x
15
+x
2
+1), must have a zero
remainder if no error occurred (if not the slave calculates the CRC again).
Considering that the data serializing device (UART) transmits first the less significative bit (LSB) instead of the MSB as
required by the CRC calculation, such calculation is performed by inverting the polynomial. Furthermore, as the MSB
polynomial influences only the quotient and not the remainder, the remainder is deleted by making it equal to
1010000000000001.
The step by step procedure for the CRC16 calculation is the following:
1)
Load a 16-bit register with FFFFh (the bit value is 1).
2)
Perform the exclusive OR of the first character with the highest byte in the register; place the result in the register.
3)
Perform a one-bit shift of the register on the right.
4)
If the bit outcoming the register right side (flag) is 1, perform the exclusive OR between the 1010000000000001
generating polynomial and the register.
5)
Repeat the steps 3 and 4 for eight times.
6)
Perform the exclusive OR of the following character with the highest byte in the register; place the result in the
register.
7)
Repeat the steps from 3 to 6 for all the message characters.
8)
The content of the 16-bit register is the CRC redundancy code to be added to the message.
8.3.4 Message synchronization
The message synchronization between the transmitter and the receiver is obtained by interposing a pause between the
messages, such pause being equal to 3.5 times the character period. If the receiver does not receive for a period equal to
4 characters, the message is considered to be over; as a consequence the following received byte is treated as the first
byte of a new message: an address.
8.3.5 Serial line setting
The communication foresees the following settings:
1 start bit
8 data bits (RTU protocol)
1 stop bit
no parity
