![Supermicro SuperBlade SBI-7125B-T1 Скачать руководство пользователя страница 8](http://html1.mh-extra.com/html/supermicro/superblade-sbi-7125b-t1/superblade-sbi-7125b-t1_bios-setup-manual_1404452008.webp)
SBI-7125B-T1 BIOS Setup Manual
6
ROM Scan Ordering
Determines what kind of option ROM activates first. The options are
Onboard
First
and Addon First.
PCI Fast Delayed
Transaction
Enabling improves heavy DMA transfer for 32-bit PCI multimedia cards. The
options are Enabled and
Disabled
.
Reset Configuration
Data
If set to Yes, this setting clears the Extended System Configuration Data (ESCD)
area. The options are
Yes
and No.
Large Disk Access
Mode
This setting determines how large hard drives are to be accessed. The options
are
DOS
or Other (for Unix, Novelle NetWare and other operating systems).
Table 7. Advanced Chipset Control Submenu Menu Options
Menu Option
Description
SERR Signal
Condition
This setting specifies the ECC Error conditions that an SERR# is to be asserted.
The options are None,
Single Bit
, Multiple Bit and Both.
4GB PCI Hole
Granularity
This feature allows you to select the granularity of PCI hole for PCI slots. If
MTRRs are not enough, this option may be used to reduce MTRR occupation.
The options are
256 MB
, 512 MB, 1GB and 2GB.
Memory Branch
Mode
This option allows the BIOS to enumerate Host Mode for Device 16, Function 1,
Reg. 40h bit 16 and Reg. 58h [14]. The options are
Interleave
, Sequential,
Mirror and Single Channel 0.
Branch 0 Rank
Interleave
Selects the Branch 0 rank interleave. The options are 1:1, 2:1 and
4:1
.
Branch 0 Rank
Sparing
Enable to enable the sparing feature for Branch 0 Rank. The options are
Enabled and
Disabled
.
Branch 1 Rank
Interleave
Selects the Branch 1 rank interleave. The options are 1:1, 2:1 and
4:1
.
Branch 1 Rank
Sparing
Enable to enable the sparing feature for Branch 1 Rank. The options are
Enabled and
Disabled
.
Enhanced x8
Detection
Select enabled to enable Enhanced x8 DRAM UC Error Detection. The options
are
Enabled
and Disabled.
High Bandwidth FSB Select
Enabled
to enable a high bandwidth FSB or Disable to disable it.
High Temp DRAM OP Select Enabled to enable a high temp DRAM OP or
Disable
to disable it.
ABM Thermal Sensor Select Enabled to enable the ABM thermal sensor or
Disable
to disable it.
Thermal Throttle
Select Enabled to enable the Thermal Throttle function or
Disable
to disable it.
Global Activation
Throttle
Select Enabled to enable the Global Activation Throttle function or
Disable
to
disable it.
Crystal Beach
Feature
Enabling this creates memory-mapped accesses to the Crystal Beach
configuration space located in Device 8, Fn 0 and Fn 1. The options are
Enabled
and Disabled.
Route Port 80h
Cycles to
This feature allows the user to decide which bus to send debug information to.
The options are PCI and
LPC
.
Table 6. PCI Configuration Submenu Menu Options (Continued)
Menu Option
Description