Obsolete Product(s) - Obsolete Product(s)
STMicroelectronics Confidential
53/62
AN1290
Miscellaneous
●
BMute function (1Fd6): B+ can be enabled/disabled alone, it will come back with its own soft-
start.
●
BSafe function: if it is selected through I²C (Sad1Fh/d5), BOut will switch OFF as soon as the H
oscillator Unlock is detected; when it locks again, B+ will come back with its own soft-start.
●
HLock speed: If bit 1Fd2 is set, an Unlocked state will be detected twice as fast as with the rest
of the family. Remember that a mode with composite sync, long vertical sync and no serration
pulses could unduly indicate Unlock!
●
Identification bit 1Fd3 allows to identify by software whether the IC is the TDA9112A or not.
8.2
Early V Blanking and Lock/Unlock
The TDA9112 family delivers an early blanking pulse on pin 3. The purpose is to provide early V
blanking (synchronous to VSync), because blanking from the V Flyback pulse alone would arrive
too late to blank the beginning of the retrace. The pulse begins with the VSync front edge, and
finishes with the end of the VCapacitor discharge. For correct V blanking, it needs to be ORed
with the VFlyback data.
The pulse amplitude is always 1V (enough to control a small bipolar transistor). It is superimposed
above the HLock/Unlock level (0V when locked, 5V when Unlocked). If you connect the transistor in
DC, blanking will be permanent when Unlocked. Refer to Application Hints if you want the display
(and OSD if any) to be visible also when Unlocked.
The Unlock indication may be disabled through I²C programming (Sad16h/d0). Permanent blanking
may be forced with 17d0.
8.3
Application Hints
8.3.1
Using Inhibition Properly
Emergency Procedure with H-Lock; V Blanking
Inhibition through I²C should be used with care for the following reason: When horizontal scanning
is inhibited, B+ is inhibited at the same time. Since scanning is stopped, there is no more power
consumption and B+ will keep its last value for possibly a fraction of a second. If inhibition
disappears at that moment, the horizontal frequency may have changed to a lower value. Starting
again in this condition is dangerous for the scanning transistor.
In a practical case, the inhibition was triggered because some very high frequency H sync pulses
appeared when switching from high-frequency to low-frequency mode. These pulses were unduly
interpreted as “frequency out of range”.
shows an application diagram used to ensure a safe restart.
Further to the normal feedback resistive network which senses the horizontal amplitude, a second
one with lower impedance is directly connected to B+. Resistors are calculated to maintain B+ at a
low value, for instance lower than the free-running value. However, a diode and a transistor keep it
isolated from the normal resistive network as long as pin 3 remains LOW.
As soon as any change appears in the Hsync frequency, pin 3 goes HIGH, rapidly discharging the
3.3µF capacitor, and B+ decreases down to the value imposed by the low-impedance network. This
must be completed before Inhibition takes place. When the H frequency locks again, pin 3 goes
LOW again. The transistor saturates again after a delay set by the 3.3µF capacitor to ensure that
Inhibition is finished. Then B+ will resume its normal value after a soft-start.
