Development and debugging tool support
AN2339
14/20
The following table shows the recommended values and types:
Note:
1
The recommended value for pull-ups and pull-downs is 10k
Ω
, although the optimum value
depends on the signal load. For example, pull-downs should be about 1k
Ω
when working
with TTL logic.
2
It is recommended that you place the JTAG header as closely as possible to the STR91x
device, because this minimizes any possible signal degradation caused by long PCB tracks.
5.1.2 JTAG
signal
integrity and maximum cable lengths
When using longer cables it is essential to consider the cable as a transmission line and to
provide appropriate impedance matching, otherwise reflections occur.
With the typical situation at the target end (weak drivers, no impedance matching resistors)
you can only expect reliable operation over short cables (approximately 30cm). If operation
over longer cables is required:
●
For very long cables, a solution is to buffer the JTAG signals through differential drivers,
such as the LVDS cable. Reliable operation is possible over tens of metres using this
technique.
●
For intermediate lengths of cables, you can instead improve the circuitry used at the
target end. The recommended solution is to add an external buffer with good current
drive and a 100
.
series resistor for the
TDO
and
RTCK
signals
5.2 ETM
interface
The STR91x supports the connection of an external Embedded Trace Module
(ETM9) to
provide real time code tracing of the ARM966E-S macrocell in an embedded system.
The ETM interface is primarily one-way. To provide code tracing, the ETM block must be
able to monitor various ARM9E-S inputs and outputs. The required ARM9E-S inputs and
outputs are collected and driven out from the ARM966E-S macrocell from the ETM interface
registers.
In STR91x devices the ETM9 interface has nine pins in total, four of which are data lines,
and all pins can be used for GPIO when tracing is no longer needed. The ETM9 interface is
used in conjunction with the JTAG interface for trace configuration.
Table 2.
Recommended JTAG debug port components
Signal name
Recommended external resistor type
JTCK
Should have a pull-down between pin and VSSQ to enable hot swap and
post-mortem debugging
JTDI
Pull-up between pin and VDDQ
JTDO
Pull-up between pin and VDDQ
JTMS
Pull-up between pin and VDDQ
JTRST
Pull-down between pin and VSSQ
JRTCK
Should have a pull-down to fix a stable value on that signal when debugging
a non-synthesizable core.
