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ST EVAL-RHRICL1AFV1 Скачать руководство пользователя страница 6

3

Features: EVAL-RHRICL1ATV1, re-triggerable mode

3.1

Getting started

The EVAL-RHRICL1ATV1 evaluation board is customized to allow the test of re-triggerable operative mode of the
RHRPMICL1A integrated current limiter (ICL).
In the re-triggerable mode, the ICL restarts automatically, recovering its normal operating mode if the current
limitation cause is removed; besides, during any overload or output short-condition events, after the T

OFF

recovery time elapses, the device tries to re-start for a dedicated T

ON

slot time (trip-off time).

The configuration pins of the ICL in this mode are:
•

Telecommand interface: disabled (TC_ON and TC_OFF both connected to V

CC

)

•

SET_STS is connected to V

CC

•

SET_FLB is connected to GND

•

TON is connected to C

ON

•

TON is connected to C

OFF

The external components of the board are pre-set to accomplish the following features:
•

V

CC

= 50 V with V

TH_ON

= 44 V and V

TH_OFF

= 40 V

•

HYS = 4 V

•

I

LIM

= 5 A

•

T

ON

˜ 3 ms (typ 2.7 ms) with T

OFF

˜ 1s (typ. 0.94 s)

The evaluation board schematic is shown below. Please note that the capacitor Csns_2, connected in parallel to
the R

SENSE

, affects the dynamic of the reaction time and therefore the decision whether to mount it or not is up to

the application needs of the end user.

Figure 5.

Re-triggerable evaluation board (schematic)

CVcc_2_btm

4.7 uF

S

CH

2

S

T

PS

315

0

Csts_2
4.7 pF

Ctm_2

4.7 pF

Csns_2 1uF

Rcomp_2

1k

C6

4.7uF

C8

4.7uF

ZD2

1SMB5929BT3G

U2

1 2 3 4 5 6 7 8 9 10

11

17

18

19

20

16 15

14 1

3 12

V

D

_2

V

CC

+

_2

P-ch2

STRH40P10

0

C5

4.7uF

Rhys_2

1.5k

Ruvlo_2

13k

Rv_2

220k

Rsns1_2

40m

VCC+_2

1

2

1

2

C7

4.7uF

0

Rsns2_2

40m

Rir_2

100k

RGND_2

16.2k

Con_2

27nF

I_STM- _1

I_STM+_1

Rtms+_2

5k

Rtms-_2

5k

IS

N

S

-_

1

IS

N

S+

_

1

VCC+_2

VCC-_2

VCC-_2

Ccomp_2

2.2 nF

CO

M

P_

2

V

D

_2

CVcc_2

100nF

RETRIGGERABLE MODE

V

CC

+

_2

SET_FLB

SET_STS

I_

R

E

F

T_ON

T_OFF

ST

S

IC

L

_G

N

D

Rsts_2
50k

Rtm_2

100k

T

M

0

HY

S

UV

L

O

UVLO

HYS

VC

C

Rg_2

4R7

Coff_2

470nF

TC_OFF

TC

_

O

N

CN3

CN4

V

G

CFLAT20

UM2605

Features: EVAL-RHRICL1ATV1, re-triggerable mode

UM2605

-

Rev 1

page 6/27

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Содержание EVAL-RHRICL1AFV1

Страница 1: ...on Table 1 Application tools Type Part number Configuration Marking Evaluation tools EVAL RHRICL1ATV1 Re triggerable RHRPMICL1ATV1 RE TRIGGERABLE Evaluation tools EVAL RHRICL1ALV1 Latched RHRPMICL1ALV...

Страница 2: ...on activation cycle Re triggerable mode after the trip off time that is externally configurable the device switches OFF and remains in this state for a recovery time that is externally configurable On...

Страница 3: ...n current limitation mode the Vg voltage is a value inside the range VCC 12 V VCC defined by the limitation control loop 2 3 Current sense and limitation function The voltage drop on the external RSEN...

Страница 4: ...roper protection components to the application Guidelines on this feature are provided in the RHRPMICL1A datasheet 2 5 Analog telemetry The analog telemetry circuit gives information about the current...

Страница 5: ...Figure 4 Telemetry signals UM2605 Digital telemetry status telemetry UM2605 Rev 1 page 5 27...

Страница 6: ...FF 40 V HYS 4 V ILIM 5 A TON 3 ms typ 2 7 ms with TOFF 1s typ 0 94 s The evaluation board schematic is shown below Please note that the capacitor Csns_2 connected in parallel to the RSENSE affects the...

Страница 7: ...nd off again while the overload persists hic up mode The trip off time TON is set by the CON capacitor connected between the pins TON and GND and it is calculated by the following equation TON RIR CON...

Страница 8: ...Figure 7 Overload shorter than TON TOFF Figure 8 Overload longer than TON TOFF Figure 9 Continuous short circuit UM2605 Operations UM2605 Rev 1 page 8 27...

Страница 9: ...3 3 1 Layout of the EVAL RHRICL1ATV1 board Figure 10 EVAL RHRICL1ATV1 top layout Figure 11 EVAL RHRICL1ATV1 bottom layout UM2605 Operations UM2605 Rev 1 page 9 27...

Страница 10: ...2 KEMET C1812C273J5G ACTU NPO 1812 10 1 Rv_2 220 k 100 V 0 1 25 ppm C 0 125 W Panasonic ERA6AEB224V 0805 11 2 Rtms _2 Rtms _2 5 k 100 V 0 1 5 ppm C 0 200 W Vishay thin film PNM0805E5001 BST5 0805 12 1...

Страница 11: ...nt 22 1 SCH2 STPS3150 3 A 150 V ST STPS3150U Diode 100 V 5 A SMB 23 1 P_ch2 SOCKET P ch TO254AA socket for the STRH40P10 34 A 100 V 3M TOUCH SYSTEMS 203 2737 55 110 2 P channel BVdss 100 V id 48 A RDS...

Страница 12: ...V ILIM 2 A TON 10 ms TC_ON and TC_OFF are available on TC3 connector SET_STS can be connected to VCC or GND through the switch SW1 The evaluation board schematic is shown below Please note that the ca...

Страница 13: ...ccessible on the RTM and RSTS resistors respectively Figure 13 Testing environment 4 2 2 Trip off time programming In latched mode if the duration of the overcurrent is greater than the trip off time...

Страница 14: ...atched evaluation board schematic or in alternative way the device is switched OFF by applying a negative pulse signal of the typical duration of 100 s directly to the pin TC_ON In order to have a mor...

Страница 15: ...pm C Panasonic ERA6AEB224V 0 125 W 0805 10 2 Rtms _1 Rtms _1 5 k 100 V 0 1 25 ppm C Vishay thin film PNM0805E5001 BST5 0 200 W 0805 11 1 Rtm_1 100 k 100 V 0 1 25 ppm C Panasonic ERA6AEB104V I 20 A 0 1...

Страница 16: ...m Qg 162 nC 24 1 U1 ICL001 FLAT20 ST FLAT20 25 2 N CH1 N CH2 STN1NF101 A 100 V Vgsth 3 V ST STN1NF10 N ch o NPN from 60 V 100 V SOT 223 26 2 Rg_on_1 Rg_off_1 1 k 150 V 1 Vishay CRCW08051K0 0FKEA 125...

Страница 17: ...ting down the device in case of failure The pin configuration of the ICL in this operation mode is Telecommand interface disabled TC_ON and TC_OFF both connected to VCC SET_STS is connected to VCC on...

Страница 18: ...100nF SET_FLB SET_STS T_OFF ICL_GND I_REF T_ON STS Rsts_3 50k TM 0 HYS UVLO VG UVLO HYS VCC Rg_3 4R7 FOLDBACK MODE Rcomp_3 1k Ctm_3 4 7 pF TC_ON TC_OFF R_flb 107k Ruvlo_3 35 7k Rtm_3 100k Rtms _3 5k...

Страница 19: ...back current limiter characteristic This behavior is obtained by adding two sensing resistors RS3 and RS3 between the RSENSE terminals and ISNS and ISNS pins of the RHRPMICL1A device In addition the f...

Страница 20: ...re 20 Foldback current limiter characteristic reached when a short circuit on the load side occurs and persists The Eq 10 and Eq 11 are intended as a theoretical support to estimate the foldback curre...

Страница 21: ...3 1 CVcc_3_btm 4 7 F capacitor 100 V 1812 TDK C4532X7S2A4 75M X7S 1812 4 1 CVcc_3 100 nF 100 V 1206 MULTICOMP MCCA000490 X7R 1206 5 1 Csns_3 1 F 10 V 0805 KEMET C0805C105K8 NACTU X8L 0805 6 1 Ccomp_3...

Страница 22: ...IT Y RN73C2A2K61 BTDF 0805 18 1 Ruvlo_3 35 7 k 100 V 0 1 25 ppm C 0 100 W TE CONNECTIVIT Y RN73C2A35K7 BTDF 0805 19 1 Rcomp_3 1 k 0 1 25 ppm C 125 mW Panasonic ERA6AEB102V 0805 20 1 Rir_3 100 k 100 V...

Страница 23: ...Revision history Table 7 Document revision history Date Version Changes 24 Jul 2019 1 Initial release UM2605 UM2605 Rev 1 page 23 27...

Страница 24: ...and trip off time programming 7 3 3 1 Layout of the EVAL RHRICL1ATV1 board 9 3 3 2 Bill of material of the EVAL RHRICL1ATV1 board 10 4 Features EVAL RHRICL1ALV1 latched mode 12 4 1 Getting started 12...

Страница 25: ...ools 2 Table 3 Signal on digital telemetry pin 4 Table 4 Bill of material 10 Table 5 Bill of material of the EVAL RHRICL1ALV1 board 15 Table 6 EVAL RHRICL1AFV1 bill of material 21 Table 7 Document rev...

Страница 26: ...1ATV1 top layout 9 Figure 11 EVAL RHRICL1ATV1 bottom layout 9 Figure 12 Latched evaluation board schematic 12 Figure 13 Testing environment 13 Figure 14 Latched on at start up diagram 14 Figure 15 Lat...

Страница 27: ...ts and ST assumes no liability for application assistance or the design of Purchasers products No license express or implied to any intellectual property right is granted by ST herein Resale of ST pro...

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