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M3i.48xx / M3i.48xx-exp Manual
FIFO Single acquisition mode
Acquisition modes
The total amount of samples per channel that is acquired can be calculated by [SPC_LOOPS * SPC_SEGMENTSIZE]. Please stick to the below
mentioned limitations of the registers.
Difference to standard single acquisition mode
The standard modes and the FIFO modes differ not very much from the programming side. In fact one can even use the FIFO mode to get the
same behavior like the standard mode. The buffer handling that is shown in the next chapter is the same for both modes.
Pretrigger
When doing standard single acquisition memory is used as a circular buffer and the pre trigger can be up to the [installed memory] - [minimum
post trigger]. Compared to this the pre trigger in FIFO mode is limited by a special pre trigger FIFO and can only be much less.
Length of acquisition.
In standard mode the acquisition length is defined before the start and is limited to the installed on-board memory whilst in FIFO mode the
acquisition length can either be defined or it can run continuously until user stops it.
Example FIFO acquisition
The following example shows a simple FIFO single mode data acquisition setup with the read out of data afterwards. To keep this example
simple there is no error checking implemented.
Limits of pre trigger, post trigger, memory size
The maximum memory size parameter is only limited by the number of activated channels and by the amount of installed memory. Please
keep in mind that each samples needs 2 bytes of memory to be stored. Minimum memory size as well as minimum and maximum post trigger
limits are independent of the activated channels or the installed memory.
Due to the internal organization of the card memory there is a certain stepsize when setting these values that has to be taken into account.
The following table gives you an overview of all limits concerning pre trigger, post trigger, memory size, segment size and loops. The table
shows all values in relation to the installed memory size in samples. If more memory is installed the maximum memory size figures will increase
according to the complete installed memory
All figures listed here are given in samples. An entry of [32G - 8] means [32 GSamples - 8 ] = 34,359,738,360 samples.
spcm_dwSetParam_i32 (hDrv, SPC_CHENABLE, CHANNEL0); // only one channel activated
spcm_dwSetParam_i32 (hDrv, SPC_CARDMODE, SPC_REC_FIFO_SINGLE); // set the FIFO single recording mode
spcm_dwSetParam_i32 (hDrv, SPC_PRETRIGGER, 1024); // 1 kSample of data before trigger
// in FIFO mode we need to define the buffer before starting the transfer
int16* pnData = new int16[lBufsizeInSamples];
spcm_dwDefTransfer_i64 (hDrv, SPCM_BUF_DATA, SPCM_DIR_CARDTOPC, 4096, (void*) pnData, 0, 2 * lBufsizeInSamples);
// now we start the acquisition and wait for the first block
dwError = spcm_dwSetParam_i32 (hDrv, SPC_M2CMD, M2CMD_CARD_START | M2CMD_CARD_ENABLETRIGGER);
dwError = spcm_dwSetParam_i32 (hDrv, SPC_M2CMD, M2CMD_DATA_STARTDMA | M2CMD_DATA_WAITDMA);
// we acquire data in a loop. As we defined a notify size of 4k we’ll get the data in >=4k chuncks
llTotalBytes = 0;
while (!dwError)
{
// read out the available bytes
spcm_dwGetParam_i64 (hDrv, SPC_DATA_AVAIL_USER_LEN, &llAvailBytes);
llTota= llAvailBytes;
// here is the right position to do something with the data (printf is limited to 32 bit variables)
printf ("Currently Available: %d, total: %d\n", (int32) llAvailBytes, (int32) llTotalBytes);
// now we free the number of bytes and wait for the next buffer
spcm_dwSetParam_i64 (hDrv, SPC_DATA_AVAIL_CARD_LEN, llAvailBytes);
dwError = spcm_dwSetParam_i32 (hDrv, SPC_M2CMD, M2CMD_DATA_WAITDMA);
}
Activated
Used
Memory size
Pre trigger
Post trigger
Segment size
Loops
Channels
Mode
SPC_MEMSIZE
SPC_PRETRIGGER
SPC_POSTTRIGGER
SPC_SEGMENTSIZE
SPC_LOOPS
Min
Max
Step
Min
Max
Step
Min
Max
Step
Min
Max
Step
Min
Max
Step
1 channel
Standard Single
16
Mem
8
defined by post trigger
8
8G - 8
8
not used
not used
Standard Multi/ABA 16
Mem
8
8
8k
8
8
Mem/2
8
16
Mem/2
8
not used
FIFO Single
not used
8
8k
8
not used
16
8G - 8
8
0 (
∞
)
4G - 1
1
FIFO Multi/ABA
not used
8
8k
8
8
8G - 8
8
16
pre+post
8
0 (
∞
)
4G - 1
1
2 channels
Standard Single
16
Mem/2
8
defined by post trigger
8
8G - 8
8
not used
not used
Standard Multi/ABA 16
Mem/2
8
8
4k
8
8
Mem/4
8
16
Mem/4
8
not used
FIFO Single
not used
8
4k
8
not used
16
8G - 8
8
0 (
∞
)
4G - 1
1
FIFO Multi/ABA
not used
8
4k
8
8
8G - 8
8
16
pre+post
8
0 (
∞
)
4G - 1
1
