Spectrum M2i.60xx, Руководство по оборудованию

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Clock generation External clocking
(c) Spectrum GmbH 89
Maximum external sampling rate in MS/s
An external sample rate above the mentioned maximum can cause damage to the board.
The following table shows the available ranges when using external clocking:
The range must not be left by more than 5% when the board is running. Remember that the ranges depend
on the activated channels as well, so a different board setup for external clocking must always include the
related clock ranges.
This table below shows the ranges that are defined by the two range registers mentioned above. The range depends on the activated channels
per module. For details about what channels of your specific type of board is located on which module, please take a look at the according
introduction chapter. Please be sure to select the correct external range, as otherwise it is possible that the card will not run properly.
How to read this table? If you have a card with a total number of four channels (available on two modules with two channels each), you have
an external clock source with 30 MHz and you activate channel 0 and channel 2 (one channel per module), you will have to set the external
range to EXRANGE_LOW. If you activate channel 0 and channel 1 on the same card and use the same 30 MHz external clock, you will
have to set the external range EXRANGE_HIGH instead. Example:
Further external clock details
• When using the high clock range the external clock has to be stable, needs to be continuously and is not allowed to have gaps or fast
changes in frequency.
• When using the high clock range there must be a valid external clock be present before the start command is given.
• The external clock is directly used to feed the converters (on analog boards) or to feed the input registers (on digital boards). Therefore the
quality and jitter of this clock may improve or degrade the dynamic performance of the card depending on the quality of the provided
clock.
• When using the low clock range the clock needn’t to be continuously and may have gaps. When using a A/D card please keep in mind
that most A/D converters need a stable clock and there might be false samples inbetween directly after a gap or after a fast clock fre-
quency change. The quality of the analog samples may also be worse than with a continuous clock.
External clock with divider
In some cases it is necessary to generate a slower frequency for sampling rate generation, than the available external source delivers. For
these applications one can use an external clock and divide it.
activated Channels
M2
i.
60
11
M2
i.
60
12
M2
i.
60
21
M2
i.
60
22
M2
i.
60
30
M2
i.
60
31
M2
i.
60
33
M2
i.
60
34
Ch0 Ch1 Ch2 Ch3
X 20 MS/s 20 MS/s 60 MS/s 60 MS/s 125 MS/s 125 MS/s 125 MS/s 125 MS/s
X 20 MS/s 20 MS/s 60 MS/s 60 MS/s n.a. 125 MS/s 125 MS/s 125 MS/s
X n.a. 20 MS/s n.a. 60 MS/s n.a. n.a. n.a. 125 MS/s
X n.a. 20 MS/s n.a. 60 MS/s n.a. n.a. n.a. 125 MS/s
X X 20 MS/s 20 MS/s 60 MS/s 60 MS/s n.a. 125 MS/s 62.5 MS/s 62.5 MS/s
X X n.a. 20 MS/s n.a. 60 MS/s n.a. n.a. n.a. 125 MS/s
X X n.a. 20 MS/s n.a. 60 MS/s n.a. n.a. n.a. 125 MS/s
X X n.a. 20 MS/s. n.a. 60 MS/s n.a. n.a. n.a. 125 MS/s
X X n.a. 20 MS/s n.a. 60 MS/s n.a. n.a. n.a. 125 MS/s
X X n.a. 20 MS/s n.a. 60 MS/s n.a. n.a. n.a. 62.5 MS/s
X X X X n.a. 20 MS/s n.a. 60 MS/s n.a. n.a. n.a. 62.5 MS/s
Register Value Direction Description
SPC_EXTERNRANGE 20130 read/write Defines the range of the actual fed in external clock. Use one of the below mentioned ranges
EXRANGE_LOW 64 External range for slower clocks
EXRANGE_HIGH 128 External range for faster clocks
For cards with 8 bit converter resolution For cards with 12, 14, 16 bit converter resolution
Activated Channels
on one module EXRANGE_LOW EXRANGE_HIGH EXRANGE_LOW EXRANGE_HIGH
1 < 50.0 MHz >= 50.0 MHz < 50.0 MHz >= 50.0 MHz
2 < 50.0 MHz >= 50.0 MHz < 25.0 MHz >= 25.0 MHz
4 < 25.0 MHz >= 25.0 MHz < 12.5 MHz >= 12.5 MHz
8 < 12.5 MHz >= 12.5 MHz < 6.0 MHz >= 6.0 MHz
spcm_dwSetParam_i32 (hDrv, SPC_CLOCKMODE, SPC_CM_EXTERNAL); // activate ext. clock (which is e.g. 30 MHz)
spcm_dwSetParam_i32 (hDrv, SPC_CHENABLE, CHANNEL0 | CHANNEL1); // activate two channels (asuming that they
// are located on one module) you
spcm_dwSetParam_i32 (hDrv, SPC_EXTERNRANGE, EXRANGE_HIGH); // set external range to EXRANGE_HIGH
Register Value Direction Description
SPC_CLOCKMODE 20200 read/write Defines the used clock mode