Spectrum M2i.3010, Руководство по оборудованию

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Mode Gated Sampling Acquisition modes
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Mode Gated Sampling
The Gated Sampling mode allows the data acquisition controlled by an
external or an internal gate signal. Data will only be recorded if the pro-
grammed gate condition is true. When using the Gated Sampling acqui-
sition mode it is in addition also possible to program a pre- and/or
posttrigger for recording samples prior to and/or after the valid gate.
This chapter will explain all the necessary software register to set up the
card for Gated Sampling properly.
The section on the allowed trigger modes deals with detailed description
on the different trigger events and the resulting gates.
When using Gated Sampling the maximum pretrigger is limited as shown in the technical data section. When the programmed value
exceeds that limit, the driver will return the error ERR_PRETRIGGERLEN.
Acquisition modes
Standard Mode
Data will be recorded as long as the gate signal fulfills the programmed gate condition. At the end of the gate interval the recording will be
stopped and the card will pause until another gates signal appears. If the total amount of data to acquire has been reached, the card stops
immediately. For that reason the last gate segment is ended by the expiring memory size counter and not by the gate end signal. The total
amount of samples to be recorded can be defined by the memsize register. The table below shows the register for enabling Gated Sampling.
For detailed information on how to setup and start the standard acquisition mode please refer to the according chapter earlier in this manual.
The total number of samples to be recorded to the on-board memory in Standard Mode is defined by the SPC_MEMSIZE register.
FIFO Mode
The Gated Sampling in FIFO Mode is similar to the Gated Sampling in Standard Mode. In contrast to the Standard Mode you cannot program
a certain total amount of samples to be recorded, but two other end conditions can be set instead. The acquisition can either run until the
user stops it by software (infinite recording), or until a programmed number of gates has been recorded. The data is read continuously by
the driver. This data is online available for further data processing by the user program. The advantage of Gated Sampling in FIFO mode is
that you can stream data online to the host system with a lower average data rate than in conventional FIFO mode without Gated Sampling.
You can make real-time data processing or store a huge amount of data to the hard disk. The table below shows the dedicated register for
enabling Gated Sampling in FIFO mode. For detailed information how to setup and start the card in FIFO mode please refer to the according
chapter earlier in this manual.
The number of gates to be recorded must be set separately with the register shown in the following table:
Register Value Direction Description
SPC_PRETRIGGER 10030 read/write Defines the number of samples to be recorded per channel prior to the gate start.
SPC_POSTTRIGGER 10100 read/write Defines the number of samples to be recorded per channel after the gate end.
Register Value Direction Description
SPC_CARDMODE 9500 read/write Defines the used operating mode
SPC_REC_STD_GATE 4 Enables Gated Sampling for standard acquisition.
Register Value Direction Description
SPC_MEMSIZE 10000 read/write Defines the total number of samples to be recorded per channel.
Register Value Direction Description
SPC_CARDMODE 9500 read/write Defines the used operating mode
SPC_REC_FIFO_GATE 64 Enables Gated Sampling for FIFO acquisition.
Register Value Direction Description
SPC_LOOPS 10020 read/write Defines the number of gates to be recorded
0 Recording will be infinite until the user stops it.
1 … [4G - 1] Defines the total number of gates to be recorded.