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Содержание HOT-553

Страница 1: ...Spacewalker HOT 553 Pentium processor Based PCI main board User s Manual SPAC E W A LKER ...

Страница 2: ...ind the following booklet prepared by the Federal Communications Commission helpful Flow to Identify and Resolve Radio TV Interference Problems This booklet is available from the U S Government Printing Office Washington DC 20 102 Stock 00 t 000 003 t5 l FCC Warning The user is cautioned that changes or modifications not expressly approved by the manufacturer could void the user s authority to ope...

Страница 3: ...ache Type Selection 10 Pipeline BurstType Cache Size Selection JP4 JP64 11 Parallel Port DREQ Selection JP60 JP61 12 Clear Password JP72 12 Flash EPROM jumper jP9 1 3 Clear CMOS jPlI 13 Connectors 14 Chapter 3 Memory Configuration 15 Chapter 4 Award BIOS Setup 16 The Main Menu 1 7 Standard CMOS Setup 19 BIOS Features Setup 21 Chipset Features Setup 23 Power Management Setup 26 PCI Configuration Se...

Страница 4: ... providesincreased integration and improved performance over other chip set designs The 82430HX PCIset chipset provides an integrated Bus Mastering IDE controller with two high performance IDE interfacesfor up to four IDE devices The onboard Super I O controller provides the standard PC I O functions floppy interface two FIFO serial ports an IR device port and a SPP EPP ECP capable parallel port U...

Страница 5: ...ks of EDO RAM and Fast Page DRAM ranging from 8MB to 256MB Supports 4MB 8MB 16MB 32MB and 64MB 72 pins SIMMs Supports DRAM Error Checking and Correcting ECC Cache Memory Integrated L2 write back cache controller 256KB or 512KB Direct Mapped Pipeline Burst Cache Power Management Function Provides four power management modes Full on Doze Standby and Suspend Supports Microsoft APM Provides EPMI Exter...

Страница 6: ...burst transfers One floppy port One parallel port Supports SPP PS 2 compatible bidirectional Parallel Port EPP Extended Parallel Port and ECP Extended Capabilities Port high performance parallel port Two serial ports Supports 16C550 compatible UARTS Supports serial InfraRed communication One PS 2 mouse port USB Universal Serial Bus port Board Design Dimension 22cm x 28cm User s Manual 5 ...

Страница 7: ...witch Flash Vpp Parallel Port DREQ Select Keyboard BIOS System Clock Select Clear CMOS Onboard Regulator VRM Select Clear Password tl ll CPU Clock Multiplier Cache Size Onboard Pipeline Burst Select Select Mixed 3 3V Mode Select 16 User s Manual ...

Страница 8: ... jumpercaps on JP3and jP58 the user can change the Host Bus Clock CPU Core Clock ratio from 1 1 5 to 1 3 CPU Bus Core Ratio System Clock CPU Clock Speed P16 IP13 P79 tP3 JP38 73 MH2 Pentium Processor 30 MHz 90 MHz Pentium Processor 60 MHz 1M11 0 100 MHz Pentium Processor 66 MHz iPT r0 120 MHz Pentium Processor 60 MHz 123 MHz Pentium Processor 50 MHz 133 MHz Pentium Processor 66 MHz 150 MHz Pentium...

Страница 9: ...HSJltU 1 2 133 MHz Cyrix 6x86 P166 66 MHz CPU Clock Speed JP16 JP15 P79 System Clock JP3 JP58 CPU Bus Core Ratio 75 MHz AMDK5 PR75 JPU JPIS 50 MHz in iP i rgTirnti 90 MHz AMD K5 PR90 ipvi m m 60 MHz JP JP5 0 0 too MHz AMD K5 PR100 66 MHz 3 0 90 MHz AMDK5 PR120 1 1 IPI3 tP7 0 60 MHz 1 1 5 100 MHz AMD K5 PR133 66 MHz iP3 P IISSS 120 MHz AMDK5 PR150 JPI6 1 1 IP7V 1 60 MHz 18 User s Manual ...

Страница 10: ...D K5 Default 3 3 3 6V ranger from onboard regulator Addon VRM forP55C alUi 3 3V 2 5V from addon VRM Onboard regulator and Addon VRM forP55C sUl ibbI b tFst 3 3V ranger from onboard regulator 2 5V from addon VRiM Onboard Voltage Regulator Output Selection JP5 6 7 HOT 553 mainboard is designed to offer several CPU voltages level for Pentium processor Cyrix 6x86 and AMD K5family requirements 3 3V for...

Страница 11: ...external Tag SRAM is required Pipeline Burstcache module If the HOT 553 is ordered with no cache installed the cache can be added later in a field upgrade by installing a 256KB pipeline burstcache module into the CELP socket Iffactory option on HOT 553 mainboard integrate 256KB pipeline burst cache installed already thecachesize can befield upgrade to 512KB by installing a 256KB pipeline burst cac...

Страница 12: ...B by installing a secondary 256KB pipeline burst cache module into the CELP socket 256KB Cache Memory 1 as On mainboard integrate 256KB pipeline burst cache mounted or a first 256KB pipeline burst cache module in the CELP socket 512KB Cache Memory On mainboard integrate 256KB pipeline burst cache mounted and a secondary 256KB pipeline burst cache module in the CELP socket Note There aresometechnic...

Страница 13: ... Port JP60 JP61 DMA Selection Parallel Port ECP Mode DMA Request 1 151 MM default Parallel Port ECP Mode ii1 DMA Request 3 HI Clear Password JP72 Allows system password to be cleared by shorting jumper jP72 and turning the system on Password is cleared by jumper JCP message will shown up on power on screen The system should then be turned off and the jumper JP72 should be returned to OPEN to resto...

Страница 14: ... boot up Flash utility supports both 5V and 12V Flash EEPROM Clear CMOS jPII HOT 553 mainboard supports jumper P11 for discharge mainboard s CMOS memory The CMOS memory retains the system configuration information in the component of R T C You should short this jumper for a moment when you wish to clear CMOS memory and then makesure open thisjumperfor normal opera tion to retain your new CMOS data...

Страница 15: ...2 Clear BIOS Password JP74 Green LED JP19 EPMI Connector P20 On board Enhanced IDE R W LED Connector JP80 JP81 Universal Serial Bus USB Connectors JP63 IR Communication Port Connector 1P71 Display type Color Mono Switcher USB Connectors Pin out 3 2 T3 t i c Q a a JP63 Infra Red 2 3 4 VCC VCC IROA CNO IRIA PS 2 Mouse Connector HOT 553 mainboard providestwotype ofPS 2style mouseconnectors type A and...

Страница 16: ...an not mixed within the same memory bank HOT 553 Memory Cottfiguration Reference Table SIMM 1 1 SIMM 3 4 TOTAL 4 MB Empty 8 MB 8 MB Empty 16 MB 16 MB Empty 32 MB 32 MB Empty 64 MB 64 MB Empty 128 MB Empty 4 MB 8 MB Empty B MB 16 MB Empty 16 MB 32 MB Empty 32 MB 64 MB Empty 64 MB 128 MB 4 MB 4 MB 16 MB 4 MB 8 MB 24 MB 4 MB 16 MB 40 MB 4 MB 32 MB 2 MB 4 MB 64 MB 136 MB 8 MB 4 MB 24 MB 8 MB 8 MB 32 M...

Страница 17: ...riefly at the bottom of the screen during the POST Power On Self Test press Del key or simultaneously press Ctrl Alt and Esc keys TOENTER SETUPBEFOREBOOTPRESSCTRL ALT ESCOR DELKEY If the message disappears before you respond and you still wish to enter Setup restart the system to try again by turning it OFF the ON or pressing the RESET button on the system case You may also restart bysimultaneousl...

Страница 18: ...he items in a standard compatible BIOS BIOSfeaturessetup Thissetup page includes all the items of Award special enhanced features Chipsetfeaturessetup This setup page includes all the items of chipset features Power ManagementSetup This setup page includes all the items of Power Management features PCI Configuration setup This category specifies the value in units ofPCI bus blocks ofthe latency ti...

Страница 19: ...Setup Menu IDE HDD autodetection Automatically configure IDE hard disk drive parameters Password setting Change set or disable password It allows you to limit access to the system and Setup or just to Setup Save Exitsetup Save CMOS value change to CMOS and exit setup Exitwithoutsaving Abandon all CMOS value changes and exit setup 118 User s Manual ...

Страница 20: ...The time is calcu lated base on the 24 hour military time clock For example 5 p m is 17 00 00 Daylightsaving The category adds one hour to the clock when daylight saving time be gins It also subtracts one hour when standard time begins DriveCtype Drive Dtype Thecategory identify the typesofhard disk drive Cor drive D that has been installed in the computer There are46 predefined types and a user d...

Страница 21: ...display card and monitor Although secondary monitors are supported you do not have to select the type in Setup Error halt The category determines whether the computer will stop off an error is detected during power up Memory Thecategory is display only which is determined by POST Power On Self Test ofthe BIOS Base Memory The POST of the BIOS will determine the amount of base or conven tional memor...

Страница 22: ...Quit Ti Select Item Help PUxPD Modify Old Ualues Shift F2 Color Load BIOS Defaults Load Setup Defaults CPU Internal Cache This category enables CPU internal cache to speed up memory access External Cache This category enables external cache to speed up memory access Quick Power On Self Test This category speeds up Power On Self Test POST after you power on the computer If it is set to Enabled BIOS...

Страница 23: ...password is notentered atthe prompt When Setup isselected thesystem will boot butaccesstoSetup will be denied ifthecorrect password is notentered atthe prompt PS 2MouseControlFunction Thiscategory to setthe PS 2 mouse be used or not Ifthere a PS 2 mouse attached to your system this category must be enabled if not please disabled thiscategory to release IRQ12for PCI device PCIVGA PaletteSnoop Thisc...

Страница 24: ...S Old Ualues ShiftlFZ Color Fb Load BIOS Defaults F7 Load Setup Defaults AutoConfiguration Pre defined values for DRAM cache timing acccording to CPU type system clock The choice Enabled and Disabled When this item is enabled the pre defined items will become show only DRAM Timing The DRAM timing is controlled by the DRAM Timing Registers The tim ings programmed into this register are dependent on...

Страница 25: ...has been fully decoded This can reduce all read latencies Turn Around Insertion When this is enabled the chipset will insert one extra clock to the turn around of back to back DRAM cycle ISA Clock This item allows you to selectthe PCI clock type System BIOS Cacheable This category allows the userto set whetherthesystem BIOS FOOO FFFF areas are cacheable or non cacheable Video BIOSCacheable Thiscat...

Страница 26: ...his item allows you to select between two methodsofDRAM errorcheck ing EGG and Parity Memory Parity EGG Check This item allows you to select between three methods of memory error checking Auto Enabled and Disabled Single BitError Report When a single bit error is detected the offending DRAM row ID lateched The lateched valued is held until software explicity clears the error status flag Chipset NA...

Страница 27: ...Setup Defaults Power Management Thiscategory determinestheoptionsofthe power managementfunction Defaultvalue is Disable Thefollowing pagestell you theoptionsofeach item describe the meanings ofeach options Disabled User Define Min Saving Max Saving Global Power Management will bedisabled Userscan configure their own power management Predefined timer values are used such that all tim ers are in the...

Страница 28: ... motor off when system is in SUSPEND mode Disable HDD s motor will not off IRQ3 5 8 12 Wake Up EventsIn Doze Standby If this category sets to Off the IRQ3 5 8 or 12 event s activity will not reactivates the system from Doze and Standby mode IfthiscategorysetstoOn theIRQ3 5 8or 12event sactivity will reactivate system from Doze and Standby mode Power Down Resume Events Ifthese categoriessetsto Off ...

Страница 29: ... PCl lSA PnP PCI IBQ Actlued By Let el PCI IDE IBQ Map To PCI AUTO PrlPiary IDE INTO A Secondary IDE INTO B ESC F1 F5 F6 F7 Quit tl M Select Iten Help PU PD Modify Old Ualues Shirt F2 Color Load BIOS Defaults Load Setup Defaults ResourcesControlled By The options in these categories are Auto Manual Auto BIOS will auto configurate system IRQsand DMAsresources Manual System IRQsand DMAsare adjusted ...

Страница 30: ...r ISA PnP devices IRQ12assigned to Thesystem BIOS will assign IRQ 12to legacy ISA or PCI ISA PnP IRQl2defaultassign toPCI ISA PnPfor PCI or ISA PnP devices Since PS 2 mouse uses the same IRQ if there are a PS 2 mouse on your system assign IRQl2to legacy ISA to avoid system conflict IRQ14assigned to The system BIOS will assign IRQ 14to legacy ISA or PCI ISA PnP IRQl4default assign to legacy ISA for...

Страница 31: ...Defaults IDEHDD Block Mode Thiscategory is useiJ tosetIDE HDD Block Mode Ifyour IDE Hard Disk supports block mode then you can enable this function to speed up the HDDaccesstime Ifnot pleasedisablethisfunction toavoid HDDaccess error PCISlotIDE2nd channel This category is used to defined add on PCI IDE secondary controller is Enable or Disable setting On ChIpPrimaryPCIIDE This category is used to ...

Страница 32: ...E8H or Disabled Infra Red IR Function HOT 553 main board support lrDA HPS R and Amplitudes Shift Keyed IR ASKIR infrared through COM 2 port This category specifies onboard Infra Red mode to FIPSIR ASKIR or Disabled IR Transfer Mode This item specifies onboard infrared transfer mode to full duplex or half duplex Onboard Parallel Port This category specifies onboard parallel port address to 378H 278...

Страница 33: ...tered passwordfrom CMOS memory You will beaskedtoconfirm the password Typethe password again and press Enter You mayalso press Esc toaborttheselec tion and notenter a password Todisable password justpress Enter when you are prompted toen ter password A messagewillconfirm thepassword beingdisabled Once the password is disabled thesystem will bootand you can enter Setup freely PASSWORD DISABLED Ifyo...

Страница 34: ...ts fr I U 5 4 h r M y rt ...

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