21
Pin No.
Pin Name
I/O
Description
1
XSRQ
O
Data request signal output to the RF signal decoder (IC622)
2
XSHD
I
Header flag signal input from the RF signal decoder (IC622)
3
VDD
—
Power supply terminal (+3.3V)
4
VSS
—
Ground terminal
5
SDCK
I
Serial data clock signal input from the RF signal decoder (IC622)
6
SMUTE
I
Muting signal input from the system controller (IC605) “L”: muting
7
XMSLAT
I
Latch signal input from the system controller (IC605)
8
MSCK
I
Clock signal input from the system controller (IC605)
9
MSDATI
I
Serial data input from the system controller (IC605)
10
MSDATO
O
Serial data output to the system controller (IC605)
11
MSREDY
O
Ready signal input from the system controller (IC605) “L”: ready
12
XMSDOE
O
Data enable signal output terminal Not used (open)
13
XRST
I
Reset signal input from the expander (IC612)
14
MCKI
I
Master clock signal input terminal
15
VSS
—
Ground terminal
16
CK75S
I
Master clock select signal input terminal “L”: 512fs, “H”: 768fs (fixed at “H” in this set)
17
EXCKO1
O
External clock 1 signal output terminal Not used (open)
18
EXCKO2
O
External clock 2 signal output terminal Not used (open)
19
LRCK
I/O
Clock signal input/output terminal (44.1kHz) Not used (open)
20
NC
—
Not used (open)
21
MNT2
O
Monitor 2 signal output terminal Not used (open)
22
TRST
I
Reset signal input from the expander (IC612) “L”: reset
23
TCK
I
Clock signal input terminal for test (normally: fixed at “L”)
24
TDI
I
Data input terminal for test (normally: open)
25
TENA1
I
Data enable signal input terminal for test (normally: open)
26
TDO
O
Data output terminal for test (normally: open)
27
VST
—
Ground terminal for test (normally: fixed at “L”)
28
VDD
—
Power supply terminal (+3.3V)
29
VSS
—
Ground terminal
30
MNT1
O
Monitor 1 signal output terminal Not used (open)
31
MNT0
O
Monitor 0 signal output terminal Not used (open)
32
XBIT
O
Monitor signal output terminal Not used (open)
33
F75HZ
O
Clock output terminal (75Hz) Not used (open)
34
SUPDAT
O
Serial data output terminal Not used (open)
35
XSUPAK
O
Data flag signal output terminal Not used (open)
36
SUPEN
O
Data enable signal output terminal Not used (open)
37
TEST1
I
Test 1 signal input terminal for test (normally: fixed at “L”)
38
VSS
—
Ground terminal
39
TEST2
I
Test 2 signal input terminal for test (normally: fixed at “L”)
40, 41
VSS
—
Ground terminal
42
BCKD
I
Phase reference signal input terminal
43 to 45
NC
—
Not used (open)
46
BCKA
I
Shift clock signal input terminal
47
DSAL
O
DSD data (Lch) output terminal
48
DSAR
O
DSD data (Rch) output terminal
49
ZDFLGL
O
Data (Lch) flag detect signal output terminal
• MAIN BOARD IC617 CXD2751Q (DSD DECODER)
Содержание SCD-XB940
Страница 5: ...5 SECTION 2 GENERAL This section is extracted from instruction manual ...
Страница 6: ...6 ...
Страница 7: ...7 ...
Страница 10: ...10 TRAY 1 Remove the tray Careful of the claw claw claw ...
Страница 12: ...12 12 SCD XB940 4 2 PRINTED WIRING BOARD TK Board See page 11 for Circuit Boards Location Page 14 Page 14 ...
Страница 17: ...17 17 SCD XB940 4 7 SCHEMATIC DIAGRAM MAIN Board 2 6 Page 16 Page 20 Page 21 Page 18 Page 21 ...
Страница 19: ...19 19 SCD XB940 4 9 SCHEMATIC DIAGRAM MAIN Board 4 6 See page 32 for Waveform Page 16 Page 18 Page 20 ...
Страница 20: ...20 20 SCD XB940 4 10 SCHEMATIC DIAGRAM MAIN Board 5 6 Page 16 Page 19 Page 17 Page 16 Page 16 Page 18 Page 21 ...
Страница 27: ...27 27 SCD XB940 4 19 SCHEMATIC DIAGRAM DISPLAY Board See page 32 for Waveforms Page 29 Page 16 ...
Страница 33: ...33 2 IC203 ea EXTAL DISPLAY Board 1 IC201 tk OSCO 4 1 Vp p 484 ns 3 8 Vp p 8 MHz ...