SCD-XA9000ES
28
28
DATA BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
X901
20MHz
FJMP1
FJMP2
SPDA
TE
FE
PI
MD2
SENS
LOCK
FOK
GFS
DATA
XLAT
COUT
SCLK
CLOK
MUTE_CD
SQCK
SQSO
SCOR
DOON
DATA_RF
CLK_RF
MIRR
LDON
SP_ERR
SP_ON
MUTE_LOAD
LOAD_IN
LOAD_OUT
JIT
GFS_V
APDO
MUTE_2D
XHRD
XHRD, XHWR, XCS1882,
XINIT0, XINIT1, XRST_DVD
XHWR
XCS1882
XINIT0
XINIT1
INIT_DF
LAT_DF_A
DATA_DF
DATA_DF, CLK_DF, INIT_DF,
LAT_DF_A, LAT_DF_B,
MODE_SACD, MULTI
CLK_DF
MLS_RST
MLS_OSC
MLS_SIO
MLS_SIO, MLS_SCK,
MLS_RST, MLS_OSC
MLS_SCK
LAT_DF_B
SWGUP
SWGUP, AMUTE,
AMUT_MCH
MULTI
MODE_SACD
AMUT_MCH
XFBSY
XFBSY, SIO, SOO,
SCO, XIFCS, XFRRST
SIO
SOO
SCO
XIFCS
SOUT_DSD
SCK_DSD
XLAT_DSD
SIN_DSD
SIN_DSD, SIN_DY, SOUT_DSD,
SCK_DSD, XLAT_DSD, RDY_DSD,
MUTE_DSD, XCS_DY, RST_DY,
XRST_DSD, SAMBA_TEST
SIN_DY
RDY_DSD
MUTE_DSD
XCS_DY
RST_DY
EEPROM
IC903
D0 – D7
A0 – A7
XRST_DVD
SAMBA_TEST
XRST_DSD
XFRRST
AMUTE
VMOD
XRST_CD
SDEN
LIM_SW
D+3.3V
S001
(LOADING IN)
OFF
r
IN
OFF
r
OUT
S002
(LOADING OUT)
DATA_DF, CLK_DF, INIT_DF,
LAT_DF_A, LAT_DF_B, MULTI
5-3.
BLOCK DIAGRAM – MAIN Section (2/2) –