NV-U74
41
Pin No.
Pin Name
I/O
Description
H22
LDD4
O
RGB (blue) signal output to the liquid crystal display
H23
LDD5
O
RGB signal output terminal Not used
H24
LDD3
O
RGB (blue) signal output to the liquid crystal display
J1 to J3
MA3, MA6, MA7
O
Address signal output to the NOR
fl
ash memory
J4
VSS_MEM
-
Ground terminal
J21
VSS_CORE
-
Ground terminal
J22
LDD6
O
RGB (green) signal output to the liquid crystal display
J23
VCC_CORE
-
Power supply terminal (+1.5V)
J24
VCC_LCD
-
Power supply terminal (+3.2V)
K1
MD15
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
K2 to K4
MA4, MA5, MA2
O
Address signal output to the NOR
fl
ash memory
K10 to K15
VSS_CORE
-
Ground terminal
K21
VSS_CORE
-
Ground terminal
K22 to K24
LDD8, LDD9, LDD7
O
RGB (green) signal output to the liquid crystal display
L1
MD14
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
L2
MD31
I/O
Two-way data bus with the SD-RAM
L3
VCC_MEM
-
Power supply terminal (+3V)
L4
VSS_MEM
-
Ground terminal
L10 to L15
VSS_CORE
-
Ground terminal
L21
LDD10
O
RGB (green) signal output to the liquid crystal display
L22, L23
LDD13, LDD11
O
RGB (red) signal output to the liquid crystal display
L24
VCC_CORE
-
Power supply terminal (+1.5V)
M1
VCC_MEM
-
Power supply terminal (+3V)
M2, M3
MD30, MD29
I/O
Two-way data bus with the SD-RAM
M4
MD13
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
M10 to
M15
VSS_CORE
-
Ground terminal
M21
VSS_CORE
-
Ground terminal
M22
LDD15
O
RGB (red) signal output to the liquid crystal display
M23
VCC_CORE
-
Power supply terminal (+1.5V)
M24
LDD12
O
RGB (red) signal output to the liquid crystal display
N1, N2
MD27, MD28
I/O
Two-way data bus with the SD-RAM
N3
MD12
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
N4
VSS_MEM
-
Ground terminal
N10 to
N15
VSS_CORE
-
Ground terminal
N21
VSS_IO
-
Ground terminal
N22, N23
LDD16, LDD17
O
RGB signal output terminal Not used
N24
LDD14
O
RGB (red) signal output to the liquid crystal display
P1
VCC_MEM
-
Power supply terminal (+3V)
P2
MD11
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
P3
MD26
I/O
Two-way data bus with the SD-RAM
P4
MD10
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
P10 to P15
VSS_CORE
-
Ground terminal
P21
VSS_CORE
-
Ground terminal
P22
L_PCLK_WR
O
Bit clock signal output to the liquid crystal display
P23
L_LCLK_A0
O
Horizontal sync signal output to the liquid crystal display
P24
VCC_LCD
-
Power supply terminal (+3.2V)
R1
MD24
I/O
Two-way data bus with the SD-RAM
R2
VSS_MEM
-
Ground terminal
R3
MD25
I/O
Two-way data bus with the SD-RAM
R4
MD9
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
R10 to
R15
VSS_CORE
-
Ground terminal
R21
L_BIAS
O
Effective data display signal output to the liquid crystal display
R22
MSLED_EN
O
LED drive signal output terminal for memory stick access indicator “H”: LED on
R23
L_FCLK_RD
O
Vertical sync signal output to the liquid crystal display
Содержание NV-U74
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