18
18
MEX-1GP
MEX-1GP
3-2. BLOCK DIAGRAM — MEMORY SECTION —
1
2
3
4
VBUS
D-
D+
GND
27,29,31,34
29 – 52,
D1 – 8
D1 – 8
B2 17
B3 16
B4 15
B5 14
B6 13
B7 12
B8 11
RE
WP
BUSY
WE
CE0
CLE
ALE
RE
BUSY
WE
CE0
CLE
ALE
RE
WP
BUSY
WE
CE0
CLE
ALE
RE
BUSY
+3.3V
WE
CE0
CLE
ALE
X1003
12MHz
LED921
CN901
X1002
16.9344MHz
RE
WP
BUSY
WE
CE0
CLE
ALE
SDRAM
IC907
BUS SWITCH
IC916
RESET
IC914
RESET
IC910
+3.3V REG.
IC905
Q903
D921
D922
+1.8V REG.
IC904
+3.3V REG.
IC903
BUS SWITCH
IC915
CODEC
IC911
D/A CONVERTER
IC908
SYSTEM CONTROL
IC801 (2/4)
LPF
IC906
USB I/F
IC902
18 – 11
+1.8V
+5V
+3.3V
+3.3V
(SDRAM)
AUDIO_L
R-CH
SL_MA_DAT
SL_MA_CLK
MA_SL_DAT
MA_SL_REQ
+5V REG.
IC901
SEG4
DISP+B
DATA
• Signal Path
: MEMORY PLAY
• R-ch is omitted due to same as L-ch.
Содержание MEX 1GP - Giga Panel Radio
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