HVR-M15J/M15U/M15N/M15E/M15P/M15C
4-6
VD-036 (1/17)
C3014
XX
C3007
XX
(7/17)
(7/17)
(7/17)
(7/17)
: Voltage measurement of the CSP ICs
and the Transistors with mark, are
not possible.
D24A00_SIM
VLAT_IN_FYO1
HYO_SLGATE
TFS_FCO
RCO1_EDVD
RYI2_DE2
RYO0_DEHD
ADATAIN0
RCO3_FRMREF
FRAT_REFO
DRP
ADATAIN1
RCI2_DE6
VLAT_SYNC_FCI
HCI_FYI0
FLAT_SYNC_FYO0
RYO2_DEFLD
HCO_FYI1
ADATAOUT1
ADATAOUT0
RYI0_DE0
MFLG_QRST
THCRQ_FHDI
RYO1_DEVD
RCO2_EDFLD
MFLG_QRST
RCO0_EDHD
HYI_PLL27IN
ALE_SIM
RYO3_SGOUT
RCI3_DE7
THCRQ_FHDI
RCI1_DE5
FLAT_SYNC_FYO0
RYI1_DE1
D28A04_SIM
FS_EDGE_REF
XVSP_SCK
RYI1_DE1
SWP
FRRV
HYI_PLL27IN
HCI_FYI0
RCO0_EDHD
RYI0_DE0
THYRQ_FVDI
RYI3_DE3
RYI2_DE2
RYI3_DE3
VLAT_SYNC_FCI
RCO2_EDFLD
RCI0_DE4
CK64FSO
CKFSO
VLAT_IN_FYO1
DIR
CK27MF02_R
CRECCK
CRECDT
CRECA2
CRECA1
CK27MF02_R
CKFSO
CK64FSO
C3004
4.7u
C3016
4.7u
C3022
0.1u
C3015
0.1u
C3008
0.1u
C3002
4.7u
C3006
0.1u
C3010
0.1u
C3019
4.7u
C3017
4.7u
C3012
0.1u
C3021
0.1u
C3003
0.1u
C3005
0.1u
C3024 0.1u
C3018
0.1u
C3009
0.1u
C3023
0.1u
CL3000
CL3002
FLAT_SYNC_FYO0
ADATAIN0
D_2.8V_1
VLAT_SYNC_FCI
RCO3_FRMREF
FRAT_REFO
RYO2_DEFLD
TFS_FCO
A_1.5V
CK27MF02_T
HCO_FYI1
RYO3_SGOUT
RYO1_DEVD
A_2.8V
RCO2_EDFLD
REG_GND
HYI_PLL27IN
ADATAIN1
CK13MFO1
CKFSO
RCO0_EDHD
THCRQ_FHDI
HYO_SLGATE
FS_EDGE_REF
RYO0_DEHD
D_1.5V
CK64FSO
RCO1_EDVD
THYRQ_FVDI
VLAT_IN_FYO1
RCI2_DE6
ADATAOUT1
RCI1_DE5
RCI3_DE7
RYI1_DE1
RYI0_DE0
RCI0_DE4
ADATAOUT0
HCI_FYI0
MFLG_QRST
RYI2_DE2
RYI3_DE3
FB3001
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
1
40
141
142
143
144
44
52
43
51
42
50
41
49
40
48
39
47
38
46
37
45
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
L3002
10uH
L3005
10uH
L3006
10uH
L3007
10uH
L3001
10uH
R3015
0
R3019
0
R3018
0
R3003
0
R3005
0
R3001 100
R3013
0
R3020
0
R3023
0
R3021
100
C3027
4.7u
L3009
10uH
R3022
100
C3026
4.7u
L3008
10uH
LDIR
INTV4(1.5V)
YO1
MA3
IOGND2(3.0V)
RECDT
MA10
MDQ5
OSCIN
RECA2
TICK
INTG6(1.5V)
HYO
INTG2(1.5V)
MDQ1
AMC
VLAT_IN
TRST
ADVDD
MA0
YO0
RECCKO
HCO
PLLSW
LRCK
IOVDD4(3.0V)
VITOUT
ADGND
27M
IOVDD3(3.0V)
DRP
PBCK
BCK
NC
ALE
MA11
ADDT0
OSCOUT
MA6
IOGND5(3.0V)
FLAT_SYNC
MXWE
CI0
DGND
PCOR
TEST
MSSCK
INTV3(1.5V)
INTG5(1.5V)
VICKO
INTV2(1.5V)
INTG7(1.5V)
PLLRVDD
CI2
MDQ11
VRB
YO3
PLLMSK
OVDD
TMFLG
INTG8(1.5V)
FRL
RECA1
MDQ2
IOGND1(3V)
INTV1(1.5V)
MSCSS
NC
THCRQ
MDQ6
INTV6(1.5V)
DICK
MA7
IOVDD1(3.0V)
INTG3(1.5V)
XRST
YO2
SMC
VLAT_SYNC
IOVDD2(3.0V)
INTG4(1.5V)
SWP
MA2
IOGND7(3.0V)
IOGND6(3.0V)
VRT
DICO_DVDD
MCDA0
ADDT3
INTV5(1.5V)
IOGND3(3.0V)
MSCSV
IOGND4(3.0V)
PLLSVDD
MCDA4
FRRV
MDQ0
(11/17)
(10/17)
(9/17)
(11/17)
(10/17)
(11/17)
(4/17)
(2/17)
(5/17)
(11/17)
(4/17)
(3/17)
(2/17)
(5/17)
(11/17)
(5/17)
(3/17)
(2/17)
(11/17)
(11/17)
(12/17)
(2/17)
(3/17)
(11/17)
(2/17)
(5/17)
(3/17)
(2/17)
(11/17)
(5/17)
(11/17)
(16/17)
(10/17)
(5/17)
(5/17)
(4/17)
(5/17)
(4/17)
(5/17)
(9/17)
(4/17)
(5/17)
(4/17)
(12/17)
(9/17)
10
14
C
16
D
I
DV SIGNAL PROCESS
11
6
5
F
15
7
12
J
17
05
XX MARK: NO MOUNT
G
2
3
B
K
4
18
A
13
8
L
9
H
1
E
(17/17)
(12/17)
(5/17)
VD-036 BOARD (1/17)
IC3001
UPD15002AFC-DN2-E2-A
DV SIGNAL PROCESSOR
IC3001
@004
@005
@001
@002
@003
SWP
D24A00_SIM
D29A05_SIM
RDX_SIM
ALE_SIM
WR01_SIM
D30A06_SIM
XVSP_SCK
D28A04_SIM
D26A02_SIM
D27A03_SIM
VSP_SO
D31A07_SIM
D25A01_SIM
VSP_SI
D24A00_SIM
D31A07_SIM
RDX_SIM
D29A05_SIM
VSP_SO
XVSP_SCK
WR01_SIM
SWP
VSP_SI
D25A01_SIM
D26A02_SIM
D28A04_SIM
ALE_SIM
D30A06_SIM
D27A03_SIM
@006
@011
(3/17)
@007
@008
@009
@010
DRP
DXXA08_SIM
DXXA09_SIM
TRRT
FRRV
TRRV
TRRV
DXXA08_SIM
DXXA09_SIM
FRRV
DRP
TRRT
LBUS2
DIR
XACC
LBUS1
LBUS0
XENA
LBUS3
FCLR
TRCKO
FCLR
LBUS0
LBUS3
XACC
DIR
XENA
LBUS2
LBUS1
TRCKO
@013
(2/17)
(11/17)
(10/17)
@014
@012
RF_IN
CS_IC_3001_BUS
XCS_IC_3001
XRST_IC_3001
CRECDT
CRECCK
CRECA2
VITDT
CRECA1
VITCK
ATF_LATCH
CS_IC_3001_BUS
XCS_IC_3001
ATF_LATCH
CRECCK
CRECA2
CRECDT
RF_IN
CRECA1
@017
@018
@019
@020
@016
(5/17)
@015
D_2.8V_1
D_1.5V
A_2.8V
A_1.5V
MCDA2
MBA1
MBA0
MA5
LBUS2
MSCSR
MCHA1
SCWIN
ATFSMPL
MCDA5
TEST2
ADATAOUT0
MXRAS
FRAT_REFO
MDQ12
VRC
BUNRI
ADDT1
LBUS0
YI3
INTG9(1.5V)
ADDT4
MEMCKO
SPCKO
MDQ4
THYRQ
MDQ8
MCHA0
YI1
LBUS3
XACC
MDQ9
NC
MCDA3
NC
HYI
HCI
MCDA6
LBUS1
TEST3
IOVDD5(3.0V)
ADATAIN0
MCCE
CO1
MSO2MC
MA9
WRX
CO0
YI0
FCLR
INTG1(1.5V)
ADATAOUT1
MCDA7
YI2
INTV7(1.5V)
INTV8(1.5V)
TRCKO
MDQ7
XENA
CO2
ADDT2
PLLRGND
MDQ13
MXCS
TRRT
MA1
OGND
MSI2
MDQ3
FS_EDGE_REF
MDQ14
CI1
TRRV
AGND
CCDMODE1
RDX
TEST1
MCDA1
MA4
TFS
CO3
ADDT5
MXCAS
MDQ15
PLLSGND
MDQ10
DICO_AVDD
MA8
OSCVDD
CI3
IOVDD6(3.0V)
ADATAIN1
TGCK
RF_IN
CCDMODE0
CS_IC_3001_BUS
D30A06_SIM
D27A03_SIM
DXXA09_SIM
LBUS1
LBUS3
RYO1_DEVD
RYO3_SGOUT
D26A02_SIM
ADATAOUT0
VSP_SI
RCI1_DE5
DXXA08_SIM
FRAT_REFO
ADATAIN0
ATF_LATCH
HCO_FYI1
HYO_SLGATE
XCS_IC_3001
WR01_SIM
THYRQ_FVDI
D29A05_SIM
XACC
LBUS2
LBUS0
RCI0_DE4
RCO1_EDVD
RYO0_DEHD
ADATAOUT1
FS_EDGE_REF
ADATAIN1
RCI3_DE7
RCO3_FRMREF
TFS_FCO
RYO2_DEFLD
RCI2_DE6
TRRT
D25A01_SIM
VSP_SO
TRRV
RDX_SIM
D31A07_SIM
FCLR
TRCKO
XENA
RF_IN
C3020
0.001u
C3025
0.47u
C3013
0.01u
R3008
100
R3007
2200
D3003
KV1870RTL-G
1
2
3
C3011
0.001u
R3002
10k
L3003
0.56uH
R3004
10k
D3002
RB751S-40TE61
R3006
270
C3001
0.001u
D3001
RB751S-40TE61
Содержание HVR M15U - Professional Video Cassete recorder/player
Страница 165: ... 2006 Sony Corporation 2 678 753 11 1 Digital HD Videocassette Recorder HVR M15U M15N M15E M15P Operating Instructions ...
Страница 243: ......
Страница 244: ...Printed in Japan Printed on 100 recycled paper using VOC Volatile Organic Compound free vegetable oil based ink GB ...
Страница 247: ...HARDWARE LIST 3 3 41 M3 0 X 8 0 Tapping Silver 3 065 748 01 8 0 3 0 42 M2 0 X 4 0 Tapping Silver 7 628 253 00 2 0 4 0 ...