Sony HCD-RG66T, Руководство по обслуживанию

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52
HCD-RG66T
•
PANEL BOARD IC601 MB90M407PF-G-114-BND (FLUORESCENT INDICATOR TUBE DRIVER, KEY CONTROL)
Pin No. Pin Name I/O Description
1 to 10 P1 to P10 O
Segment drive signal output to the fluorescent indicator tube
11 VSS-IO — Ground terminal (for I/O port)
12 to 22 P11 to P21 O
Segment drive signal output to the fluorescent indicator tube
23 VDD-FIP —
Power supply terminal (+3.3V) (for fluorescent indicator tube)
24 to 41 P22 to P39 O Segment drive signal output to the fluorescent indicator tube
42 VSS-IO —
Ground terminal (for I/O port)
43, 44 P40, P41 O
Segment drive signal output to the fluorescent indicator tube
45 to 47 NO-USE — Not used
48 VKK —
Power supply terminal (–33V) (for fluorescent indicator tube)
49 to 51 MD0 to MD2 I
Setting terminal for the CPU operational mode
52 LED-TAPE O LED drive signal output of the TAPE A/B “H”: LED on
53 LED-TUNER O
LED drive signal output of the TUNER/BAND “H”: LED on
54
LED-MD-VIDEO
O
LED drive signal output of the MD (VIDEO) “H”: LED on
55 LED-CD O
LED drive signal output of the CD “H”: LED on
56 LED-GAME O LED drive signal output of the GAME “H”: LED on
57 LED-DISC1 O
LED drive signal output of the DISC1 “H”: LED on
58 LED-DISC2 O
LED drive signal output of the DISC2 “H”: LED on
59 LED-DISC3 O LED drive signal output of the DISC3 “H”: LED on
60 I2C-DATA I/O
Communication data bus with the system controller
61 I2C-CLOCK I/O
Communication data reading clock signal input or transfer clock signal output with the system
controller
62 AVCC — Power supply terminal (+3.3V) (for A/D conversion)
63 AVSS —
Ground terminal (for A/D conversion)
64 to 66 KEY0 to KEY2 I
Key input terminal (A/D input)
67 to 72 BPF0 to BPF5 I Spectrum analyzer drive signal input from the spectrum analyzer band-pass filter
73
ALL-BAND
I
Spectrum analyzer drive signal input from the spectrum analyzer band-pass filter
74 LED-REC O
LED drive signal output of the REC PAUSE/START “H”: LED on
75, 76 NO-USE — Not used
77 RESET I
System reset signal input from the system controller “L”: reset
78 SOFT-TEST O
Output terminal for the software test
79 VOLUME-B I Jog dial pulse input from the rotary encoder (B phase input)
80 VOLUME-A I
Jog dial pulse input from the rotary encoder (A phase input)
81 VSS-CPU —
Ground terminal (for CPU)
82 X0 O System clock output terminal (4 MHz)
83 X1 I
System clock input terminal (4 MHz)
84 VCC-CPU —
Power supply terminal (+3.3V) (for CPU)
85 NO-USE — Not used
86 to 100 1G to 15G O
Grid drive signal output to the fluorescent indicator tube