5-4. BLOCK DIAGRAM — VIDEO SECTION —
– 21 –
– 22 –
D-VJ85
D0
–
D15
LEVEL
SHIFT
IC907
DATA
BCK
LRCK
20
21
19
CD-DATA
CD-BCK
CD-LRCK
DA-DATA
DA-BCK
DA-LRCK
DA-XCLK
COMPOS OUT
VCK-IN
CD-ROM
INTERFACE
CIRCUIT
MPEG
SYSTEM
DECODER
MPEG
VIDEO
DECODER
MPEG
VIDEO
DECODER
VIDEO
PROCESS
CIRCUIT
AUDIO
INTERFACE
CIRCUIT
LEVEL
SHIFT
IC908
D-RAM/ROM INTERFACE
CPU INTERFACE
HD-IN
HCK
HD-OUT
HSEL
HINT
HRDY
CAS
RESET
RAS0
MWE
MCE
MD0–MD15
MA0–MA10
A0
–
A10
A0
–
A10
D0
–
D15
A0
–
A8
D8
–
D14
A11–A17
O0–O7
D0
–
D7
A0–A10
1, 4-6, 10-12
21-23, 25-29
A0–A8
2,3, 13-16, 17-20, 31
DQ1–DQ16
30
CE
UCAS
LCAS
RAS
WE
PROGRAM ROM
IC903
16-19, 22-26
2-5, 7-10, 31-34, 36-39
28 29 14 13
D-RAM
IC905
DATA BUS
ADDRESS BUS
42
17
34
36
39
35
32
21
SCK1
SI4
SI1
P41
INT5
INT4/TC4
C RESET
RESET_L
38
SCK2
Q913
VREF
39
S12
41
INT3/TC3
VREF
COMPARATOR
IC901
7
5
6
1
3
2
SWITCH
Q911
42
INT4/TC4
SWITCH
Q912
43
PWM/PD0
25
P30
22
XIN_I
40
SO2
28
22
24
26
25
23
27
XVRST
RMSCK
RMDATO
XU_TX_REQ
XU_RX_RDY
XV_TX_REQ
29
32
30
49
6
74
SYSTEM CONTROL
IC801
VIDEO CONTROLLER
IC902
4
3
5
110
111
108
86
67
106
10-15, 17, 19, 21, 23-29
58-56, 54 52-50, 48, 46-44
60
40
119 117
112
121
114
113
42
38
37
VIDEO/AUDIO MPEG DECODER
IC906
4
2
IC910
4
2
IC902
X951
27MHz
J901
04
VIDEO OUT
• SIGNAL PATH
: CD PLAY (ANALOG OUT)
: CD PLAY (OPTICAL OUT)
: VIDEO (VIDEO CD)
J
I
K
B
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