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D-E561/E565
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• IC Block Diagrams
IC301
TC9438FNEL
IC302
TA2120FN (EL)
DATA
INTERFACE
CIRCUIT
MICRO COMPUTER
INTERFACE
CIRCUIT
OSC
20
TIMING
GENERATOR
DINAMIC
BASS BOOST
CIRCUIT
DIGITAL FILTER CIRCUIT
DEEMPHASIS FILTER CIRCUIT
ATTENUATOR OPERATIONAL CIRCUIT
∑
-
∆
MODULATION CIRCUIT
OUTPUT
CIRCUIT
ANALOG
FILTER
TEST
CIRCUIT
OUTPUT
CIRCUIT
ANALOG
FILTER
24
23
22
21
17
16
15
14
19
18
3
4
8
10
11 12
1
2
6
7
5
9
LRCK BCK DATA DBB2
(DBB1)
ATT
(EMP)
SHIFT
(SM)
LATCH VDX XO
XI GNDX MCK
13
VDD
T1
VDA
RO GNDA VR
P/S
GNDA
LO
VDA ZD GNDD
+
–
+
–
+
–
23
20
19
18
17
16
15
14
13
2
3
4
5
6
7
8
9
10
11
12
1
24
BIAS
BEEP
PW
SW
MT
SW
ALC
DET
ATT
SW
PWC
SW
OUT B
OUT A
BEEP
IN
BST
PW
B
PW
C
BST
NF
ADD
OUT
RF IN PWC
SW
OUT B OUT C OUT A
PWR
GND
MIX
OUT
ALC
IN
ALC
DET
ATT
SW
IN A
IN B
GND
MT
TC
MT
SW
PW
SW
BIAS
BIAS
IN
BST
SW
BST
OUT
VCC
ADD
A
ADD
B
21
22
PW
A
ALC
ALC
IC401
MPC18A26VMEL
IC501
BA6386K
+
–
1
7
8
9
36
34
28
23
21
20
ERROR AMP
CHARGESW
CHARGE
AMP
DCIN DETECT
35
33
ERROR AMP
PWM2
2
3
4
5
10
PWM1
32
31
30
SYSTEM
CONTROL
OSC2
LOW VCPU
DETECT
12
13
14
15
16
17
18
VCPU
22
BANDGAP
REFERENCE
STEP-UP
DC-DC
CONVERTER
REGULATOR
SAWTOOTH
PWM4
SUB
REFERENCE
11
VG
VG
VG
VG
VG
27
29
26
25
24
19
INM3
RF3
DCIN
CHGSW
BATM
CHGOUT
VIN
VOUT2
NC
VOUTB1
VOUT1
UPCKB1
UPCK1
VG
VDO
SW
VCPU
GND
RS
DCDTB
RF2
INM2
INP2
DTC3
RF1
INM1
INP1
CMP1
DTC1
VREF
SWEN
RSTB
CKOUT
SYNC
PCB
CHGON
6
DET BLOCK
PS PL
BL BS
+
–
+
–
+
–
+
–
+
–
+
–
+
15
FOCUS
SWITCH
SCRATCH
CONTROL
RAMP
OSC
+
–
12
16
+
–
24
+
–
25
26
27
28
+
–
21
22
23
20
19
17
+
–
+
–
31
30
+
–
29
8
6
11
9
5
7
+
–
4
3
10
1
32
FOCUS BIAS
18
EFM
MIRR
DEFECT
13 FEO
FOK
FON
TEO
DFR
SROCH
PD
LD
CAPC
CAGC
GND
F
E
EI
FE
VC
FBIAS
A
D
B
C
RF-
RFO
RFI
VCC
PLH
BLT
RAGC
ASY
14
HOLD BLOCK
LOOP ON
2
–
OFFSET
ADJO
TIMING
GENERATOR
ERROR
CORECTION
INTERPOLATION
SUB CODE
FOCUS
FILTER
FOCUS
CONTROL
PLL
80
79
78
77
75
72
71
67
76
74
73
70
69
68
66
65
64
61
60
59
58
56
55
54
53
53
50
49
48
47
46
44
43
42
41
63
62
57
MICRO
COMPUTER
INTERFACE
45
1
2
3
5
6
7
8
9
10
11
12
13
15
17
20
4
14
23
26
29
30
34
25
27
28
31
32
35
36
37
40
38
39
24
18
SLED
19
16
TRACKING
FILTER
SUB CODE
16K SRAM
WINDOW
EFM
CLV SERVO
TRACK
JUMP
33
BUBCK
SUBDATA
SUBSYQ
WECK
RFCK
DGND
MIRROR
SCRATCH
MUTE2
MUTE1
CLVOPO
CLVOPN
CLVOPP
TEST4
TEST3
CLVOUT
SDOUT
SDIN
TDOUT
FDOUT
21
22
TEST2
TCAPA
TZC
ATS
TEIN
OFN
FFCAPA
FEIN
FOK
RVCO
AGND
ADPFD
ADPFI
VC
TEST1
PCO
PCI
EYE
ASY
AVDD
C1FX
C2FX
C3FX
C4FX
GAINUP
CK176
BUSY
RW
DOUT
DIN
MCK
C2F2
C2F1
C1F2
C1F1
C2CLK
C2F
DE
LRCK
DOUTA
DCK
CLK
DGND
RESET
SYSCKI
GFS
GFS
SENS
XPLCK
COMPC
IC502
BU9325BKS
IC601
SM5902AF
ENCODER
GENERAL
PORT
INPUT
CONTROL 1
10
DRAM 1/F
DECODER
MICRO
COMPUTER
1/F
ATTENUATOR
INPUT
BUFFER
INPUT
1/F
OUTPUT
1/F
INPUT
CONTROL 2
8
11
22
34
35
36
37
38
39
40
41
42
43
44
33 32 31 30 29 28 27
23
24
25
26
7
20
21
14
16
15
17
19
18
12
13
2
1
3 4 5 6
COMPRESSION
MODE
THROUGH
MODE
NWE
D1
D0
D3
D2
NCAS
A10/NCAS2
NRAS
A9
A8
A7
A6
A5
A4
A0
A1
A2
A3
VDD2
UC1
UC2
UC3
UC4
UC5
DIT
NTEST
CLK
VSS
YSRDATA
VDD1
ZSENSE
NRESET
YBLKCK
YFCLK
YFLAG
ZSRDATA
ZLRCK
ZSCK
YSCK
YLRCK
YDMUTE
YMLD
YMDATA
YMCLK
9
Содержание D-E561 Primary
Страница 4: ... 4 SECTION 2 GENERAL This section is extracted from instruction manual ...
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