17
• IC514 CL8830-PE0 (MPEG DECODER)
Pin No.
Pin Name
I/O
Pin Description
1
RESERVED
I
Fixed at L in this set.
2 – 4
HDATA0 – 2
I/O
8-bit bi-directional host data bus 0 – 2 input/output
5
VDD
—
Power supply pin (+3.3 V)
6
HDATA3
I/O
8-bit bi-directional host data bus 3 input/output
7
VSS
—
Ground
8 – 11
HDATA4 – 7
I/O
8-bit bi-directional host data bus 4 – 7 input/output
12
VDD2.5
—
Power supply pin (+2.5 V)
13
RESET
I
Hardware reset input
14
VSS
—
Ground
15
WAIT
O
Host wait output
16
INT
O
Host interrupt output
17
VDD
—
Power supply pin (+3.3 V)
18
NC
O
Not used. (Open)
19
VSS
—
Ground
20 – 26
NC
O
Not used. (Open)
27
VDD
—
Power supply pin (+3.3 V)
28
NC
O
Not used. (Open)
29
VSS
—
Ground
30 – 35
NC
O
Not used. (Open)
36
VDD
—
Power supply pin (+3.3 V)
37
NC
O
Not used. (Open)
38
VSS
—
Ground
39
NC
O
Not used. (Open)
40
VDD2.5
—
Power supply pin (+2.5 V)
41
NC
O
Not used. (Open)
42
VSS
—
Ground
43 – 46
NC
O
Not used. (Open)
47
VDD
—
Power supply pin (+3.3 V)
48
NC
O
Not used. (Open)
49
VSS
—
Ground
50, 51
NC
O
Not used. (Open)
52
RESERVED
I
Fixed at L in this set.
53, 54
MDATA15, 0
I/O
Memory data 15 and 0 input/output
—
Power supply pin (+3.3 V)
I/O
Memory data 14 input/output
—
Ground
I/O
Memory data 1, 13 and 2 input/output
—
Power supply pin (+3.3 V)
I/O
Memory data 12 input/output
—
Ground
O
I/O
Memory data 3 input/output
—
Power supply pin (+2.5 V)
I/O
Memory data 11 input/output
67
VSS
—
Ground
68
MDATA4
I/O
Memory data 4 input/output
69
VDD
—
Power supply pin (+3.3 V)
70
MDATA10
I/O
Memory data 10 input/output
71
VSS
—
Ground
72 – 74
MDATA5, 9, 6
I/O
Memory data 5, 9 and 6 input/output
75
VDD
—
Power supply pin (+3.3 V)
76
MDATA8
I/O
Memory data 8 input/output
77
VSS
—
Ground
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