CDX-GT33U
CDX-GT33U
22
22
4-5.
SCHEMA
TIC DIAGRAM – MAIN Section (2/3) –
• See page 19 for waveforms. • See page 26 for IC Block Diagrams.
10
13
G
8
5
H
12
E
J
3
B
11
1
4
I
K
9
F
7
4
2
A
1
D
6
C
1
(1/3)
MAIN
CN901
A
KEY
BOARD
BOARD
MAIN
4
(3/3)
BOARD
(1/3)
2
MAIN
BOARD
(3/3)
5
MAIN
BOARD
1
4
IC B/D
IC B/D
IC B/D
0
0
0
0
00
0
0
0
0
0
4
4
4
4
3.3
3.3
3.7
3.7
3.7
3.7
(AEP
,UK)
(EXCEPT
AEP
,UK)
0(1.5)
0(4.2)
3.1(2.9)
3.1(2.9)
8.4
0(1.8)
3.8
3.8
0.4(2)
3(3.6)
3.8(5)
0.7(1.1)
6.1
6.1
8.4(6.7)
8.4(6.7)
1.1(2.9)
0(1.2)
0(1.2)
2.2
2.9(3.6)
5.6
8.4
7.1
3.4
3.2
3.2
2.5
3.2
3.3
3.3
0.1
3.1
2.5
1.6
0.7
3.2
2.9
1.6
3.1
3.2
3.2
3.2
0.3
0.6
AEP
,UK,IT
,RU MODEL
0
0
0
0
0
3.3
3.2
3.2
0
0.1
C316
50V
2.2
C203
50V
10
C212
50V
2.2
C103
50V
10
C1
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
20P
CN403
GND
USB-VBUS
GND
USB-GND
KEY
-GND
USB-D+
AUX-L
USB-D-
KEY
-1
AUX-R
RE-1
AUX-GND
RE-0
KEY
-0
LCD-CE
SIRCS
LCD-CLK
LCD-DA
TA
ILL+9V
P
ANEL
R603
10k
R609
0
R
T1N141C-TP-1
Q601
C608
0.1
16V
C602
47
C605
0.1
ISA1235AC1TP-1EF
Q602
RDS +3.3V SWITCH
C606
0.1
R602
0
C607
0.1
R607
0
R601
10k
R604
1k
R608
0
R606
100k
C604
0.1
C601
0.01
R605
10
C603
0.1
R610
0
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TDA7333013TR
IC601
VDDA
REF3
REF2
REF1
VSS
TM
VDDD
RESET
XT1
XT0
SCL
SDA
SA
CSN
INTN
MPX
10
R527
10
R526
4700p
C204
12k
R104
12k
R204
2.2k
R302
470
R103
470
R203
ABSORBER, CHIP
SURGE
D201
ABSORBER, CHIP
SURGE
D101
C301
1000p
MAZ8068GMLS0
D410
10k
R1
17
10k
R217
50V
1
C105
50V
1
C205
50V
2.2
C323
R404
0
1
2
3
3P
CN501
USB_D+
USB_D-
USB_GND
R61
1
0
10
R612
1k
R212
1k
R1
12
10k
R213
10k
R1
13
C609
100p
C612
100p
1
C812
1
C813
R
T1N140C-TP-1
Q103
R
T1N140C-TP-1
Q203
0
R829
CAM003
50V
10
C208
50V
10
C108
16V
220
C317
0
R304
10V
100
C520
32
31
30
29
28
27
1
2
3
4
5
6
26
25
24
7
8
9
23
22
21
20
10
11
12
19
18
17
13
14
15
16
BD3442FS-E2
IC302
ELECTRONIC VOLUME
BUS_LCH
BUS_RCH
TU_LCH
TU_RCH
CD_LCH
CD_RCH
AUX_LCH
AUX_GND
AUX_RCH
DS3-L
DS1-L
DS2-L
EBIAS
DS2-R
DS1-R
DS3-R
SACLK
SADA
SAOUT
ADJ
SUBOUT
-L
SUBOUT
-R
OUT
-RR
OUT
-RL
OUT
-FR
OUT
-FL
VCC
MUTE
SCL
SDA
GND
FIL
0.5%
33k
R305
R
T1N140C-TP-1
Q204
R
T1N140C-TP-1
Q104
1k
R1
16
1k
R216
R205
0
R105
0
FB602
D404
MAZ8068GMLS0
D403
MAZ8068GMLS0
D301
UDZSUSTE-176.8B
100
R614
100
R613
C524
0.01
C61
1
15p
C610
15p
16V
47
C319
10
R309
8.664MHz
X601
4MHz
X1
33k
R10
12p
C18
560uH
L8
JW138
0.1
C26
1000p
C1
C29
330p
560uH
L7
J1
22
R12
JW137
JW126
0.47
C16
L6
FM MIX
1
2
34
6
L2
2.2uH
470k
R1
0.1
C27
0
R16
0.1
C24
100
R14
470k
R2
0.1
C17
32
31
30
29
28
27
1
2
3
4
5
6
26
25
24
7
8
9
23
22
21
20
10
11
12
19
18
17
13
14
15
16
IC001
AMRFIN
AMRFDEC
FMIN2
FMIN1
GNDRF
VCC2
AMRF
AGC
LOUT
ROUT
GNDAUD
AMIF
AGC2
MPXIN
MPXOUT
RSSI
XT
AL2
XT
AL1
GNDD
SCL
SDA
VREF
VREGSUP
VCC1
GND
VCODEC
PLL
PLLREF
TEST
AMSELIN1
AMSELIN2
AMIF
AGC1
AMSELOUT1
AMSELOUT2
0.01
C22
0.01
C8
0.01
C20
1
C21
JW147
0
R3
0
R4
4.7k
R1
1
68k
R6
0
R15
VR1
0.22
C12
16V
47
C28
0.1
C9
2.2
C13
3.3uH
L1
0.01
C19
100
R13
0.01
C23
JW102
6p
C7
0
R5
JW148
0.1
C25
CAM002
10p
C6
4700p
C104
7
8
9
5
6
4
3
2
1
31
32
33
38
39
34
35
37
51
52
41
42
1000p
C5
RE1
SA_CLK
SA_DA
SA_IN
VSM
E-VOL_A
TT
DA
VN
RE0
KEY1
KEY0
LCD_CE
SIRCS
LCD_CLK
LCD_DA
TA
NOSE_SW
RDS_ON
RDS DEMODULA
T
OR
IC001
PHASE LOCKED LOOP(PLL)
MAIN BOARD
IC601
Q103,104,203,204
(ANTENNA)
(2/3)
MUTE
IC302
TEF6607T/V4/S470/M5,518
TEF6607T/V4/S470,518
CD
(MG-101Y)
MECHANISM
UNIT
(2/2)
ABSORBER,
CHIP
SURGE
RDS +3.3V CONTROL
SWITCH
(Page 21)
(Page 21)
(Page 23)
(Page 23)
(Page 25)