22
22
D-NE20/NE20LS
D-NE20/NE20LS
• IC Block Diagrams
– EGH Board –
Pin No.
Pin Name
I/O
Description
1
PE6/SI1
I
Status read signal input from LCD driver (not used)
2
PE5/SO1
O
Command send signal output to LCD driver (not used)
3
PE4/XSCK1
O
Clock signal output to LCD driver (not used)
4
PE3
O
Chip select signal output to EEPROM
5
VDIO0
–
Power supply terminal (+2.1V)
6
VSS0
–
Ground terminal
7
DVDD7
–
Power supply terminal (+1.5V)
8
PE2/DTCK
I
LCD indication of remote control signal output
9
PE1/RxD0
I
not used
10
PE0/TxD0
O
not used
11
EVA
–
Ground terminal
12
SDDQ16
I/O
Data bus to SDRAM
13
SDDQ15
I/O
Data bus to SDRAM
14
TAPTDO
–
not used
15
SDDQ14
I/O
Data bus to SDRAM
16
SDDQ13
I/O
Data bus to SDRAM
17
SCANEN
–
Ground terminal
18
SDDQ12
I/O
Data bus to SDRAM
19
SDDQ11
I/O
Data bus to SDRAM
20
TEST2
–
Ground terminal
21
SDDQ10
I/O
Data bus to SDRAM
22
SDDQ8
I/O
Data bus to SDRAM
23
VDIOSD0
–
Power supply terminal (+2.1V)
24
VSS1
–
Ground terminal
25
SDDQ9
I/O
Data bus to SDRAM
26
SDDQ6
I/O
Data bus to SDRAM
27
SDDQ7
I/O
Data bus to SDRAM
28
SDDQ2
I/O
Data bus to SDRAM
29
TEST3
–
Ground terminal
30
SDDQ4
I/O
Data bus to SDRAM
31
SDDQ3
I/O
Data bus to SDRAM
32
TEST0
–
Ground terminal
33
XSDWE
O
WE signal output to SDRAM
34
SDDQ1
I/O
Data bus to SDRAM
35
TEST1
–
Ground terminal
36
SDDQ5
I/O
Data bus to SDRAM
37
SDLDQM
O
UDQM signal output to SDRAM
38
VDIOSD1
–
Power supply terminal (+2.1V)
39
VSS2
–
Ground terminal
40
SDUDQM
O
LDQW signal output to SDRAM
41
XSDCAS
O
XCAS signal output to SDRAM
42
XSDCS
O
Chip select signal output to SDRAM
43
TEST5
–
not used
44
XSDRAS
O
XRAS signal output to SDRAM
45
SDCKE
O
CKE signal output to SDRAM
46
TEST6
–
not used
47
SDCLK
–
Clock signal output to SDRAM
48
SDA13
–
not used
49
XTRST
–
not used
50
SDA12
–
not used
• IC Pin Function Description
EGH BOARD IC603 CASINO1 (SYSTEM CONTROLLER)
w w w . x i a o y u 1 6 3 . c o m
9
9
2
8
9
4
2
9
8
T E L
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
