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Somat eDAQ
lite
94 I2773-4.
4
en
GPS Clock Interface
Select the GPS clock interface option to open another dialog window with the enable
GPS clock generation option. Select the GPS clock generation option to enable
GPS-based master sample rate clock generation. Only one GPS-based clock
generation source can be defined in a test setup. Define the network mode in the
network setup window to either GPS master or GPS stand alone. For more information
on using GPS clock generation for wireless networking, see
“Wireless Network” on
page 40 .
Enable Clock Generation (Megadac®)
Select the Megadac® clock generation option to enable Megadac® clock generation.
Only one Megadac® clock generation source can be defined in the test setup.
Sync Delay Counts (Megadac®)
The sync delay counts parameter controls the time period that the clock generation is
delayed relative to the time that the eDAQ
lite turns on the source clock that drives
data collection on both the eDAQ
lite
and the Megadac®.
For a MSR of 100 kHz, the eDAQ lite data collection start 1.00 seconds after the MSR
clock is turned back on to start a synchronized test run. This 100 kHz clock is down
sampled by ten to generate a 10000 Hz clock source for the Megadac® interface
board. Therefore, if the Megadac® starts recording on the first clock pulse issued after
switching to record mode, the sync delay counts should be set at the default value of
10000.
For a MSR of 98.304 kHz, the eDAQ
lite data collection starts 1.25 seconds after the
MSR clock is turned back on to start a synchronized test run. This 98.304 kHz clock
is down sampled by 12 to generate a 8192 Hz clock source for the Megadac®
interface board. Therefore, if the Megadac® starts recording on the first clock pulse
issued after switching to record mode, the sync delay counts should be set at the
default value of 8192.
NOTE
In general, the Megadac does not appear to start data collection on the first clock
pulse. For accurate synchronization of eDAQ
lite and Megadac® data, it is advised to
experimentally determine the desired sync delay counts for the particular test
configuration of interest.
Down Sample Factor (Megadac®)
Specify the factor by which the eDAQ
lite
down samples the MSR source clock to
generate the desired Megadac® sample rate. The down sample factor can be any
value in the range of 2 to 65535.
5.4 ELBRG (Bridge Layer)
The ELBRG offers four simultaneously sampled, low-level, differential analog inputs
through independent connectors. The ELBRG layer works with both amplified and
unamplified transducers including strain gauges, accelerometers, pressure
transducers, load cells and other general analog signals. Connect transducers to the
ELBRG individually using the M8 connectors located on the front panel.
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