12
65ME / 65ME+
1-13 SYSTEM MEMORY CONFIGURATION
• This Intel 82815 GMCH chipset integrates a system memory controller
that supports a 64-bit 100 / 133 MHz SDRAM array. The only DRAM type
supported is industry standard Synchronous DRAM (SDRAM). The
SDRAM controller interface is fully configurate through a set of control
registers.
1-14 AGP INTERFACE
• A single AGP connector is supported by the Intel 82815 GMCH AGP
interface. The AGP buffers operate in one of two selectable modes in
order to support the AGP Universal Connector:
1) 3.3V drive,
not
5 volt safe - This mode is compliant to the AGP 1.0 and 2.
0 specs.
2) 1.5V drive,
not
3.3 volt safe - This mode is compliant with the AGP 2.0
spec.
The following table shows the AGP data rate and the signaling levels sup-
ported by the 82815 GMCH chipset.
Signaling Level
1.5
V
Yes
Yes
Yes
3.3
V
Yes
Yes
No
Data Rate
1x AGP
2x AGP
4x AGP
• The 82815 chipset has a new type of clocking architecture. It has inte-
grated SDRAM buffers that run at either 100 or 133MHz, independent of
the system bus frequency. See below for a table of supported system bus
and system memory bus frequencies. The system bus frequency is se-
lectable between 66MHz, 100MHz or 133MHz. The 82815 GMCH uses a
copy of the USB clock as the DOT Clock input for the graphics pixel clock
PLL.