4. Output Clock Terminations
4.1 Differential Outputs (DIFF_0:7)
The figure below shows the output termination circuit for each of the 8 differential buffer outputs: Diff_0:7. To simplify on-board probing
of the clock, exposed copper pads have been included and are spaced to accommodate a differential probe (e.g., Ag1132A). For
example, the output of DIFF_1 can be measured using PCB13 for the signal with PCB6 for GND. The stock output clock termination is
optimized for taking phase noise measurements. Note that most phase noise analyzers have a single-ended input, so a balun should
be added to convert the differential output to single-ended.
To analyze signal integrity, instead of phase noise, change resistors R37:R44 and R74:R81 from 0 to 953 ohms. They are all 402 size.
Also, add 2pF capacitors to C42:C49 and C65:C72, which are all 402 size. After implementing this change, remember that, if you are
observing the outputs via the SMA connectors to a 50 ohm input scope, the scale should be set to 1:20.
Figure 4.1. Differential Output Clock Termination
UG337: Si53208-EVB User’s Guide • Output Clock Terminations
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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Rev. 0.1 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • July 26, 2021
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