S i M 3 L 1 x x
16
Rev 1.1
Table
3.5.
On-Chip Regulators
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
DC-DC Buck Converter
Input Voltage Range
V
DCIN
1.8
—
3.8
V
Input Supply to Output Voltage Differ-
ential (for regulation)
V
DCREG
0.45
—
—
V
Output Voltage Range
V
DCOUT
1.25
—
3.8
V
Output Voltage Accuracy
V
DCACC
—
±25
—
mV
Output Current
I
DCOUT
—
—
90
mA
Inductor Value
L
DC
0.47
0.56
0.68
μ
H
Inductor Current Rating
I
LDC
I
load
< 50 mA
450
—
—
mA
I
load
> 50 mA
550
—
—
mA
Output Capacitor Value
C
DCOUT
1
2.2
10
μ
F
Input Capacitor Value
C
DCIN
—
4.7
—
μ
F
Load Regulation
R
load
—
0.03
—
mV/mA
Maximum DC Load Current During
Startup
I
DCMAX
—
—
5
mA
Switching Clock Frequency
F
DCCLK
1.9
2.9
3.8
MHz
Local Oscillator Frequency
F
DCOSC
2.4
2.9
3.4
MHz
LDO Regulators
Input Voltage Range
V
LDOIN
Sourced from VBAT
1.8
—
3.8
V
Sourced from VDC
1.9
—
3.8
V
Output Voltage Range
V
LDO
0.8
—
1.9
V
LDO Output Voltage Accuracy
V
LDOACC
—
±25
—
mV
Output Settings in PM8 (All LDOs)
V
LDO
1.8
V < V
BAT
< 2.9
V
1.5
V
1.95
V < V
BAT
< 3.5
V
1.8
V
2.0
V < V
BAT
< 3.8
V
1.9
V
Notes:
1.
See reference manual for recommended inductors.
2.
Recommended: X7R or X5R ceramic capacitors with low ESR. Example: Murata GRM21BR71C225K with ESR < 10
m
(@ frequency > 1 MHz).
3.
Input voltage specification accounts for the internal LDO dropout voltage under the maximum load condition to ensure
that the LDO output voltage will remain at a valid level as long as
V
LDOIN
is at or above the specified minimum.
4.
The memory LDO output should always be set equal to or lower than the output of the analog LDO. When lowering both
LDOs (for example to go into PM8 under low supply conditions), first adjust the memory LDO and then the analog LDO.
When raising the output of both LDOs, adjust the analog LDO before adjusting the memory LDO.
5.
Output range represents the programmable output range, and does not reflect the minimum voltage under all
conditions. Dropout when the input supply is close to the output setting is normal, and accounted for.
6.
Analog peripheral specifications assume a 1.8
V output on the analog LDO.
Содержание SiM3L1xx
Страница 2: ...2 Rev 1 1 ...
Страница 55: ...SiM3L1xx Rev 1 1 55 6 Pin Definitions 6 1 SiM3L1x7 Pin Definitions Figure 6 1 SiM3L1x7 GQ Pinout ...
Страница 62: ...SiM3L1xx 62 Rev 1 1 6 2 SiM3L1x6 Pin Definitions Figure 6 2 SiM3L1x6 GQ Pinout ...
Страница 63: ...SiM3L1xx Rev 1 1 63 Figure 6 3 SiM3L1x6 GM Pinout ...
Страница 69: ...SiM3L1xx Rev 1 1 69 6 3 SiM3L1x4 Pin Definitions Figure 6 4 SiM3L1x4 GM Pinout ...
Страница 74: ...SiM3L1xx 74 Rev 1 1 6 4 TQFP 80 Package Specifications Figure 6 5 TQFP 80 Package Drawing ...
Страница 81: ...SiM3L1xx Rev 1 1 81 6 6 TQFP 64 Package Specifications Figure 6 9 TQFP 64 Package Drawing ...
Страница 89: ...SiM3L1xx Rev 1 1 89 Figure 7 3 SiM3L1x4 GM Revision Information ...