SIGNALCORE SC5317A, Руководство по оборудованию, Страница: 34 / 39

©2018 Rev 1.1
5 Communication Interfaces
configuration registers is provided in Table 4. Configuration Registers. Upon the execution of the register
that was sent, the device will return one (1) byte of data with bit 1 high to indicate success. This byte
must be read by the host to clear its receive buffer so that reading subsequent registers will not contain
corrupted data. Furthermore, reading back this byte will ensure that the device is ready for the next
register command.
Reading from the Device Via RS232
To query information from the device, the query registers are addressed, and data is returned. Table 5.
Query Registers contains the query register information. As with the configuration registers, it is
important that all data byte(s) (write) associated with the query registers are sent even if they are null. All
queries will return 8 bytes of data (read) with the first received byte being the most significant (MSB).
Section
4.2 Query Registers provides the format details of the received data.
PXI
The PXIe interface contains a high-speed PCIe-to-Serial bridge chip. This bridge chip communicates with
the onboard microcontroller serially. The interface on the bridge chip resides at offset addresses between
0x00 and 0xFF from BAR0; which is memory mapped. A kernel level driver for the operating system is
needed to access this memory address. A simple driver using IO controls should be sufficient to read and
write byte data to this block of addresses. Although SignalCore provides the driver and API for these
products, information is provided here for users who may need to write drivers for a different operating
system or a different driver. An example would be writing the API for the Linux operating system.
Setting Up the PCI to Serial Bridge
The serial function of the bridge chip must first be initialized before it can communicate with the onboard
microcontroller, and hence communication between the microcontroller and the PXIe bus. The
initialization can be done at the kernel level mode or at the user level mode, the decision is left to the
user. The following table lists the programing order of the bridge register addresses to initialize and setup
the serial port function.
Step BAR0 Register
Address Data (Byte)
1 0x88 0x01
2 0x04 0x00
3 0x03 0x80
4 0x00 0x07
5 0x01 0x00
6 0x03 0x0D
7 0x02 0x07
Writing to the Device
Bytes that are written to the device must go through the bridge chip. In this section, we will first look at
the write cycle of each byte, and then the write cycle of each device register. Do note the difference
between the bridge register addresses and the device register addresses.