Rev 2.0 | SC5309A & SC5310A
Hardware Manual
SignalCore, Inc.
4
SC5309A & SC5310A Hardware Manual
Figure 10. Query example: Write followed by Read to the GET_SERIAL_BUFFER
In the figure above, the first transfer cycle is to make the request for IF3 frequency data through
the GET_DEVICE_PARAM register. The subsequent cycle is to clock the data that was requested by
sending 64 clocks into the GET_SERIAL_BUFFER register.
RS232 Interface
The RS232 version of the SC5310A has a standard interface buffered by an RS232 transceiver so that
it may interface directly with many host devices, such as a desktop computer. The interface
connector for RS232 communication is labeled “Digital I/O” on the front of the panel. Refer to
3. Interface connector pin out description
for position and pin-out information. The RS232 device
communication control set is provided in the following table.
Table 9. RS232 Control Setting
Baud rate Rate of transmission
*Pin 16 of the Digital IO connector selects the rate. By default, if the pin is pulled high or open, the
rate is set to 56700 at power up or upon HW reset. When the pin is pulled low or grounded, the
rate is set to 115200 upon reset or power up.
Data bits The number of bits in the data is fixed at 8.
Parity Parity is 0 (zero)
Stop bits 1 stop bit
Flow control 0 (zero) or none
Only 3-wire RS232 is required since hardware flow control is not used. These connections are the Tx,
Rx, and Gnd. This interface is common on most host computers and microcontrollers, so user access
to host ports is readily provided by the computer OS or microcontroller hardware registers.
Writing to the Device Via RS232
It is important that all necessary bytes associated with any one register are fully sent. In other
words, if a register requires a total of 6 bytes (address plus data), then all 6 bytes must be sent
even though the last byte may be null. The device, upon receiving the first register addressing byte,
will wait for all the associated data bytes before acting on the register instruction. Failure to
complete the register transmission will cause the device to behave erratically or hang. Information
for writing to the configuration registers is provided in
Table 4. Configuration Registers
. Upon the
0x20
CLK
MOSI
CS
MISO
0x03
Invalid
Invalid
0x37
0x00
0x00
0x00
0x00
0x00
Byte 7
Byte 4
Byte 3
Byte 2
Byte 1
Byte 0
0x00
Byte 5
Request for IF3 frequency from
the GET_DEVICE_PARAM register
Clock out the 6 bytes with write to the GET_SERIAL_OUT_BUFFER register (0x26)
0x00
Byte 6
