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TC65 Hardware Interface Description
Strictly confidential / Draft
s
TC65_HD_V00.521
Page 52 of 99
24.05.2005
3.12 I
2
C Interface
I
2
C is a serial, 8-bit oriented data transfer bus for bit rates up to 400kbps in Fast mode. It
consists of two lines, the serial data line I2CDAT and the serial clock line I2CCLK.
The TC65 module acts as a single master device, e.g. the clock I2CCLK is driven by module.
I2CDAT is a bi-directional line.
Each device connected to the bus is software addressable by a unique 7-bit address, and
simple master/slave relationships exist at all times. The module operates as master-
transmitter or as master-receiver. The customer application transmits or receives data only
on request of the module.
To configure and activate the I
2
C bus use the AT^SSPI command. If the I
2
C bus is active the
two lines I2CCLK and I2DAT are locked for use as SPI lines. Vice versa, the activation of the
SPI locks both lines for I
2
C. Detailed information on the AT^SSPI command as well
explanations on the protocol and syntax required for data transmission can be found in [1].
The I
2
C interface can be powered from an external supply or via the VEXT line of TC65. If
connected to the VEXT line the I
2
C interface will be properly shut down when the module
enters the Power-down mode. If you prefer to connect the I
2
C interface to an external power
supply, take care that VCC of the application is in the range of V
VEXT
and that the interface is
shut down when the PWR_IND signal goes high. See figures below as well as Section 7 and
Figure 38.
In the application I2CDAT and I2CCLK lines need to be connected to a positive supply
voltage via a pull-up resistor.
For electrical characteristics please refer to Table 17.
GSM module
I2CDAT
I2CCLK
GND
I2CDAT
I2CCLK
GND
Application
VCC
R
p
R
p
w
VEXT
Figure 15: I
2
C interface connected to VCC of application