7
7-7
PG 760 Programming Device
C79000-G7076-C761-01
7.2
Interrupt Assignments
The PG 760 uses two integral interrupt controllers of the type 82C59 to
handle the 16 hardware interrupts (IRQ 0 to IRQ 15).
The INT output of the slave controller is connected to the IRQ 2 input of the
master controller. Interrupt 9 (IRQ 9) can be used on the bus for the assigned
interrupt 2 (IRQ 2). In the initialization phase, IRQ 9 is programmed for the
software interrupt vector 0A H (IRQ 2) by the ROM-BIOS.
The interrupts are priority-scheduled in reverse number order. Interrupt IRQ
0 has the highest priority and interrupt IRQ 7 the lowest. For triggering IRQ
2, interrupt IRQ 8 has the highest priority and interrupt IRQ15 the lowest.
Interrupts IRQ 8 to IRQ 15 therefore have priority over interrupts IRQ 3 to
IRQ 7. The interrupt vectors are initialized and masked when the PG 760 is
powered up.
List of Hardware Interrupts
Programmed
Interrupt
Vector; Memory
Address
SMI
System management interrupt; cannot be masked
-
NMI
RAM parity; I/O channel parity
INT 2 H
IRQ 0
Timer output 0; I/O controller (ISP), internal
INT 8 H
IRQ 1
Keyboard (output buffer full)
INT 9 H
IRQ 2
Interrupt from slave interrupt controller
INT A H
IRQ 3
Serial port (COM2)
INT B H
IRQ 4
V.24/V.28 interface; serial port (COM1)
INT C H
IRQ 5
Parallel port 2 (LPT2) / MPI (depends on driver used)
INT D H
IRQ 6
Diskette
INT E H
IRQ 7
Parallel port printer 1 (LPT1)
INT F H
IRQ 8
Real-time clock (RTC), low active
INT 70 H
IRQ 9
Software interrupt rerouted to 0AH (IRQ 2) (VGA)
INT 71 H
IRQ 10
ETHERNET (CP1413), depends on driver used
INT 72 H
IRQ 11
INT 73 H
IRQ 12
PS/2 mouse
INT 74 H
IRQ 13
Numeric processor
INT 75 H
IRQ 14
Winchester; IDE interface
INT 76 H
IRQ 15
CD-ROM drive, secondary IDE interface
INT 77 H
Do not use interrupts already assigned in the system.
Interrupt
Assignments
Priority
I/O Addresses of
the Interrupt
Controllers
Hardware Information
