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A30808-X3247-L14-2-7618
Technical Description (TED:BSS)
BS-240/241
Information
Base Station System
switch over, the SELICs on the active CORE are disabled by the switch logic and the
SELICs on the passive one are enabled. The SELICs on the CORE have to know
whether they are on the active or on the passive CORE. For this reason the SELICs
need a active/passive pin, which is served by the redundancy switch logic. When a
switch over occurs, the switch logic sets the active/passive pin of the former active
SELICs to "passive" and that of the former passive SELICs to "active".
The SELICs on the CUs have to recognize automatically which link comes from the
active CORE and which link from the passive one, i.e. it has to recognise a CORE switch
over by itself.
The RD interface (redundancy interface) is realized as a 2 Mbit/s HDLC link which
provides a communication interface between the two main processors (mP).
The switch logic is a flip-flop distributed over the two COREs. It manages the HW part
of a switch over and enables the COREs to know about their states as active/passive.
The CLK of the active CORE is connected with the one on the passive CORE. It allows
the passive CLK to be synchronized to the active one.
NOTE: the redundancy is implemented in a cold-standby mode, i.e., all calls will get lost
if a CORE switch over occurs.
2.2
Power Amplifier Output Level (typical values)
Modulation
Output Power
(dBm)
Output Power
(Watt)
GSM 900
CUGV3
GMSK
47.3
53.7
GSM 900
CUGV4
GMSK
47.3
53.7
GSM 1800
CUDV3 / CUDV4
GMSK
45.7
37.1
GSM 1900
CUPV4
GMSK
45.7
37.1
GSM 900
GCUGV2
GMSK
47.3
53.7
GSM 1800
GCUDV2
GMSK
47.3
53.7
GSM 850
ECU 850 HPV2
GMSK
48.3
67.6
“ “
“ “
8PSK
46.3
42.7
GSM 850
ECU 850 V3
GMSK
48.3
67.6
“ “
“ “
8PSK
46.3
42.7
GSM 900
ECU GV3
GMSK
48.3
67.6
“ “
“ “
8PSK
46.3
42.7
GSM 1800
ECU DV2
GMSK
47.3
53.7
“ “
“ “
8PSK
45.3
33.9
GSM 1800
ECU DHPV3
GMSK
48.3
67.6
Tab. 2.1
Power Amplifier Output Level