7SR10, 7SR11, 7SR12 Applications Guide
© 2018 Siemens Protection Devices Limited
Chapter 7 Page 34 of 41
50BF DTL1/50BF DTL2
The time delays run concurrently within the relay. The time delay applied to the CB Fail protection must be in
excess of the longest CB operate time + relay reset time + a safety margin.
First Stage (Retrip)
Trip Relay operate time
10ms
Reset Time
20ms
CB Tripping time
50ms
Safety Margin
40ms
Overall First Stage CBF Time Delay
120ms
Second Stage (Back Trip)
First CBF Time Delay
120ms
Trip Relay operate time
10ms
CB Tripping time
50ms
Reset Time of measuring element
20ms
Margin
60ms
Overall Second Stage CBF Time Delay
260ms
The safety margin is extended by 1 cycle for the second CBF stage as this will usually involve a back-trip of a
Busbar tripping scheme.
The timing sequence for each stage of the circuit breaker fail function is as below.
CB Backtrip
Sucessful
20
40
60
80
100
120
140
160
180
200
220
240
260
280
300
320
340
System
Fault
ms from fault
occuring
Relay
Operation
and CBF
Timer
Started
Main
Trip
Relay
Operation
Failure of
CB to trip
Reset of
CBF elements
does not occur
Backtrip
Operation
Backtrip
Trip Relay
CB Operate Time
Stage 1 CBF Timer (Backtrip) = 120ms
Figure 5-2 Single Stage Circuit Breaker Fail Timing
Stage 1 CBF Timer (Retrip) = 120ms
Failed CB Retrip
Operation
40
60
80
100
120
140
160
180
200
220
240
260
280
300
320
360
340
System
Fault
Relay
Operation
and CBF
Timer
Started
Main
Trip
Relay
Operation
CB's
Fails to
Trip
No Reset of
CBF elements
CBF Retrip
Operation
CBF Retrip
Trip Relay
CB Operate Time
Stage 2 CBF Timer (Backtrip) = 250ms
No Reset of
CBF elements
CBF Back trip
Operation
Backtrip
Trip Relay
Operation
Operation of all
BB CB's
Reset of
CBF elements
ms from
occuri
Figure 5-3 Two Stage Circuit Breaker Fail Timing
Содержание 7SR10 Argus Series
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