Shivaki STV-24LEDGR7, Руководство по обслуживанию

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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M VERF
XT AL O
HW-RS T
PCM _ A[1 4 :0 ]
PCM _ D[7 :0 ]
PWM 1
PWM 0
CI_ IRQA_ N
CI_ CE _ N
CI_ WA IT _ N
CI_ RE G_ N
CI_ RE SET
PCM _ CD_ N
CI_ A9
RX O2 +
RX O2 -
RX O0 -
RX O1 -
RX O1 +
RX O0 +
RX OC-
RX O3 +
RX O3 -
RX OC+
CI_ D6
CI_ A7
CI_ A6
CI_ A5
CI_ A4
CI_ A3
CI_ A2
CI_ A1
CI_ A0
T S_ M OST ART 0
T S_ M OVAL 0
T S_ CL K
T S_ D7
T S_ D6
T S_ D5
T S_ D4
T S_ D3
T S_ D2
T S_ D1
T S_ D0
CI_ D3
CI_ D7
CI_ D0
CI_ D4
CI_ A8
XT AL I
CI_ D1
CI_ D5
CI_ D2
KEY0
FL ASH_ WP
PWM 0
PWM 1
UA RT -T X
UA RT -RX
IR_ SYNC
HW-RS T
CI_ A1 4
CI_ A1 3
CI_ A1 2
CI_ A1 1
T S_ M DI2
T S_ M DI7
T S_ M DI5
T S_ M DI6
T S_ M DI4
T S_ M DI3
T S_ M DI0
T S_ M DI1
T S1 _ ST ART
T S1 _ VL D
T S1 _ CK
T _ SCL
T _ SDA
# IF_ OUT
IF_ OUT
SPI-CSNI
SPI-S CK I
SPI-S DII
SPI-S DO I
KEY1
SDA
SCL
CI_ IO WR_ N
CI_ WE _ N
CI_ IO RD_ N
CI_ OE_ N
T S1 _ D0
T S1 _ D1
T S1 _ D7
T S1 _ D6
T S1 _ D5
T S1 _ D4
T S1 _ D3
T S1 _ D2
M VERF
I2 S_ OUT _ M CK
I2 S_ OUT _ SD
I2 S_ OUT _ BCK
L VA0 P
L VA0 N
L VA1 N
L VA1 P
L VA2 N
L VA2 P
L VACN
L VACP
L VA3 N
L VA3 P
L VB1 P
L VB1 N
L VB2 P
L VB2 N
L VBCP
L VBCN
L VB3 N
L VB3 P
L VB0 P
L VB0 N
L VB1 N
L VB1 P
L VB2 N
L VB2 P
L VBCN
L VBCP
L VB3 N
L VB3 P
L VB0 N
L VB0 P
CI_ A1 0
AUV RM
AUV RP
AUV AG
I2 S_ OUT _ SD
I2 S_ OUT _ M CK
I2 S_ OUT _ BCK
CV BS_ OUT
PCM _ A1 1
CI_ A8
CI_ A1 4
CI_ IO WR_ N
CI_ CE _ N
PCM _ A1 3
PCM _ CE _ N
CI_ OE_ N
PCM _ IO WR_ N
CI_ A1 1
PCM _ A8
PCM _ OE_ N
CI_ A1 3
PCM _ A1 4
M IUA_ A1 3
M IUA_ DQ 0
M IUA_ DQ 1
M IUA_ BA0
M IUA_ BA1
M IUA_ DQ 2
M IUA_ BA2
M IUA_ DQ 3
M IUA_ DQ 4
M IUA_ DQ 5
M IUA_ DQ 6
M IUA_ DQ 7
M IUA_ ODT
M IUA_ DQ 8
M IUA_ DQ 9
M IUA_ DQ 1 0
M IUA_ DQ 1 1
M IUA_ DQ 1 2
M IUA_ DQ 1 3
M IUA_ DQ 1 4
M IUA_ DQ 1 5
M IUA_ A[0 :1 3 ]
M IUA_ DQ [0 :1 5 ]
M IUA_ DQ S0
M IUA_ DQ S0 B
M IUA_ DQ S1
M IUA_ DQ S1 B
M IUA_ DQ M 0
M IUA_ DQ M 1
M IUA_ M CL K
M IUA_ M CL KZ
M IUA_ M CK E
M IUA_ A0
M IUA_ A1
M IUA_ A2
M IUA_ A3
M IUA_ A4
M IUA_ A5
M IUA_ A6
M IUA_ A7
M IUA_ A8
M IUA_ A9
M IUA_ A1 0
M IUA_ A1 1
M IUA_ A1 2
M IUA_ WE Z
M IUA_ RA SZ
M IUA_ CA SZ
M IUB_ A6
M IUB_ A7
M IUB_ A8
M IUB_ A9
M IUB_ A1 0
M IUB_ A1 1
M IUB_ A1 2
M IUB_ A1 3
M IUB_ DQ 0
M IUB_ DQ 1
M IUB_ DQ 2
M IUB_ DQ 3
M IUB_ DQ 4
M IUB_ DQ 5
M IUB_ DQ 6
M IUB_ DQ 7
M IUB_ DQ 8
M IUB_ DQ 9
M IUB_ DQ 1 0
M IUB_ DQ 1 1
M IUB_ DQ 1 2
M IUB_ DQ 1 3
M IUB_ DQ 1 4
M IUB_ DQ 1 5
M IUB_ DQ [0 :1 5 ]
M IUB_ A[0 :1 3 ]
M IUB_ WE Z
M IUB_ RA SZ
M IUB_ CA SZ
M IUB_ BA0
M IUB_ BA1
M IUB_ BA2
M IUB_ ODT
M IUB_ DQ S0
M IUB_ DQ S0 B
M IUB_ DQ S1
M IUB_ DQ S1 B
M IUB_ DQ M 0
M IUB_ DQ M 1
M IUB_ M CL K
M IUB_ M CL KZ
M IUB_ M CK E
M IUB_ A0
M IUB_ A1
M IUB_ A2
M IUB_ A3
M IUB_ A4
M IUB_ A5
SPI-S DI
SPI-S DO
SPI-CSN
SPI-S CK
DV DD_ NO DIE
T S_ M OCL K
T S_ M DO 4
T S_ M DO 5
T S_ M DO 6
T S_ M DO 7
T S_ M DO [7 :0 ]
T S_ M DO 0
T S_ M DO 1
T S_ M DO 2
T S_ M DO 3
T S_ M OST ART
T S_ M OVAL
CI_ A1 2
T S1 _ D6
T S1 _ D0
T S1 _ D1
T S1 _ D2
T S1 _ D3
T S1 _ CK
T S1 _ D4
T S_ D5
T S_ D6
T S_ D7
T S_ D0
CI_ D1
T S_ D2
CI_ D3
CI_ A7
T S_ M OVAL 0
T S_ M OST ART 0
T SCL K
T SVAL ID
T SST ART
T S1 _ ST ART
T S1 _ D5
PCM _ IRQA_ N
PCM _ OE_ N
PCM _ IO RD_ N
PCM _ CE _ N
PCM _ WA IT _ N
PCM _ RE G_ N
PCM _ RE SET
PCM _ IO WR_ N
PCM _ WE _ N
CI_ D6
CI_ D7
CI_ D0
CI_ D4
T S_ D1
T S_ D3
CI_ D2
PCM _ D0
T S_ M DO 1
PCM _ D2
PCM _ D4
T S_ M DO 3
PCM _ D6
PCM _ D7
T S_ CL K
CI_ A6
CI_ A5
CI_ A4
CI_ RE G_ N
CI_ A2
CI_ A1
CI_ A0 PCM _ A0
PCM _ A1
PCM _ A2
PCM _ RE G_ N
PCM _ A4
PCM _ A5
PCM _ A6
T S_ M OCL K
T S1 _ D7
CI_ RE SET
CI_ A9
T S_ M DI7
PCM _ A9
PCM _ RE SET
CI_ A1 0
CI_ WA IT _ N
CI_ IO RD_ N
PCM _ A1 0
PCM _ WA IT _ N
PCM _ A3
PCM _ IO RD_ N
T S_ M DO 5
T S_ M DO 6
T S_ M DO 7
T S_ M DO 0
PCM _ D1
T S_ M DO 2
PCM _ D3
T S_ M OVAL
T S_ M OST ART
T S_ M DI5
T SST ART
T S_ M DI2
PCM _ A1 2
T S_ M DI4
T S_ M DI3
T S_ M DI0
T S_ M DI1
CI_ A3
CI_ D5 PCM _ D5
PCM _ WE _ N CI_ WE _ N
PCM _ IRQA_ N CI_ IRQA_ N
T S1 _ VL D T SVAL ID
ADC1 KEY0 ADC0
IR_ SYNC
SCL
SDA
UA RT -T X IS P-T XD
UA RT -RX IS P-RX D
FL ASH_ WP
SPI-CSN
SPI-S DI
SPI-S DO
SPI-S CK
RX E2 -
RX O2 -
RX E0 +
RX O1 -
RX E1 -
RX E3 +
RX O3 +
RX O0 +
RX E0 -
RX O0 -
RX E3 -
RX EC+
RX O3 -
RX OC+
RX EC-
RX OC-
RX O2 +
RX E2 +
RX E1 +
RX O1 +
L VB4 N
L VB4 P RX O4 -
RX O4 +
L ED
SCL
SDA
T S_ M DI6
PCM _ A7
T S_ D4 T S_ M DO 4
L VB4 P
L VB4 N
L VA4 P
L VA4 N
RX E4 + RX E4 -
RX O4 -
RX O4 +
RX E3 +
RX E3 - L VA3 N
L VA3 P
L VA4 N
L VA4 P
RX E4 -
RX E4 +
L VA2 P
L VA1 P
L VACN
L VA2 N
L VACP
L VA1 N
RX EC-
RX E1 +
RX EC+
RX E2 -
RX E2 +
RX E1 -
RX E0 -
RX E0 + L VA0 N
L VA0 P
SDA
SCL
L ED
L ED
ADC0
ADC1
KEY1
T SCL K
1 .8 VA
3 .3 VU
3 .3 VA
5 V_ T u n e r
5 V_ T u n e r
5 V_ T u n e r
1 .3 2 V
2 .5 VA
3 .3 VU
3 .3 VA
1 .8 VA
3 .3 VA
3 .3 VU
5 VS
3 .3 VU
3 .3 VA 3 .3 VA
3 .3 VU
VCC-Pa n e l
3 .3 VA
3 .3 VU
3 .3 VU
3 .3 VU
5 VS
PCM _ A[1 4 :0 ] SCH6
PCM _ D[7 :0 ] SCH6
PCM _ CD_ N SCH6
SV-YIN SCH8
PCM _ WA IT _ N SCH6
PCM _ IRQA_ N SCH6
RF_ AGC_ SEL SCH5
ADJ-PWM SCH2
HO T PL UG B SCH7
AUO UT R0 SCH9
AUO UT L 0 SCH9
T S_ M DI[7 :0 ] SCH6
T _ SDA SCH5
T _ SCL SCH5
RF_ AGC SCH5
VIFP SCH5
VIFM SCH5
IF_ OUT SCH5
# IF_ OUT SCH5
IF_ AGC SCH5
RG B0 _ RIN+ SCH8
RG B0 _ GIN- SCH8
RG B0 _ BIN- SCH8
RG B0 _ BIN+ SCH8
RG B0 _ GIN+ SCH8
RG B0 -SOG SCH8
RG B0 _ RIN- SCH8
RX BCL KN SCH7
RX BCL KP SCH7
RX B0 N SCH7
RX B0 P SCH7
RX B1 N SCH7
RX B1 P SCH7
RX B2 P SCH7
RX B2 N SCH7
DDCB SDA SCH7
DDCB SCL SCH7
RG B1 _ G- SCH8
RG B1 _ G+ SCH8
RG B1 _ R+ SCH8
RG B1 _ R- SCH8
RG B1 _ B+ SCH8
RG B1 _ B- SCH8
RG B1 _ SOG SCH8
US B_ DP SCH8
US B_ DM SCH8
DDCA SCL SCH7
RX ACL KN SCH7
RX ACL KP SCH7
RX A0 N SCH7
RX A0 P SCH7
HO T PL UG A SCH7
RX A1 N SCH7
RX A1 P SCH7
DDCA SDA SCH7
RX A2 P SCH7
RX A2 N SCH7 VGA-Li n SCH8
VGA-Ri n
SCH8
AV1 -Li n SCH8
AV1 -Ri n
SCH8
CV BS_ OUT SCH8
ON_ PANE L SCH2
PWR-ON/OFF SCH2
DV D_ ON/OFF SCH2
M UT E-AM P SCH9
M IUA_ BA0 SCH4
M IUA_ BA1 SCH4
M IUA_ BA2 SCH4
M IUA_ ODT SCH4
M IUA_ A[0 :1 3 ] SCH4
M IUA_ DQ [0 :1 5 ] SCH4
M IUA_ DQ S0 SCH4
M IUA_ DQ S0 B SCH4
M IUA_ DQ S1 SCH4
M IUA_ DQ S1 B SCH4
M IUA_ DQ M 0 SCH4
M IUA_ DQ M 1 SCH4
M IUA_ M CL K SCH4
M IUA_ M CL KZ SCH4
M IUA_ M CK E SCH4
M IUA_ WE Z SCH4
M IUA_ RA SZ SCH4
M IUA_ CA SZ SCH4 M IUB_ CA SZ SCH4
M IUB_ BA0 SCH4
M IUB_ DQ [0 :1 5 ] SCH4
M IUB_ BA1 SCH4
M IUB_ DQ S0 SCH4
M IUB_ BA2 SCH4
M IUB_ ODT SCH4
M IUB_ DQ S0 B SCH4
M IUB_ DQ S1 SCH4
M IUB_ DQ S1 B SCH4
M IUB_ DQ M 0 SCH4
M IUB_ DQ M 1 SCH4
M IUB_ A[0 :1 3 ] SCH4
M IUB_ M CL K SCH4
M IUB_ M CL KZ SCH4
M IUB_ M CK E SCH4
M IUB_ WE Z SCH4
M IUB_ RA SZ SCH4
ON_ PBACK SCH2
SC1 _ FB SCH8
VGA_ VSYNC SCH8
VGA_ HS YNC SCH8
T S_ M DO [7 :0 ] SCH6
T S_ M OCL K SCH6
T S_ M OST ART SCH6
T S_ M OVAL SCH6
T SST ART SCH6
T SCL K SCH6
T SVAL ID
SCH6
PCM _ IRQA_ N SCH6
PCM _ IO RD_ N SCH6
PCM _ OE_ N SCH6
PCM _ CE _ N SCH6
PCM _ RE SET SCH6
PCM _ WA IT _ N SCH6
PCM _ RE G_ N SCH6
PCM _ WE _ N SCH6
PCM _ IO WR_ N SCH6
SC1 _ FS SCH8
HDM I-CEC SCH7
US B1 _ DP SCH8
US B1 _ DM SCH8
ST B_ AM P SCH9
AUO UT L 1 SCH8
AUO UT R1 SCH8
RG B2 _ R- SCH8
RG B2 _ R+ SCH8
RG B2 _ G- SCH8
RG B2 _ G+ SCH8
RG B2 _ B- SCH8
RG B2 _ B+ SCH8
RG B2 _ SOG SCH8
AV2 -Vi n + SCH8
DV D-L i n SCH8
DV D-Ri n SCH8
HD-Li n SCH8
HD-Ri n SCH8
SIFP SCH5
SIFM SCH5
SIF_ CT L SCH5
IS P-RX D SCH8
IS P-T XD SCH8
T UNER-A NT SCH5
DV D_ IR SCH8
PCM _ PWR_ CT L SCH6
SPDIFO SCH8
DV D_ T X SCH8
SV-CIN SCH8
AV1 -Vi n + SCH8
SCL
SDA
DDCCSCL SCH7
RX CCL KN SCH7
RX CCL KP SCH7
RX C0 N SCH7
RX C0 P SCH7
HO T PL UG C SCH7
RX C1 N SCH7
RX C1 P SCH7
DDCCSDA SCH7
RX C2 P SCH7
RX C2 N SCH7
AV3 -Vi n + SCH8
DV D_ RX SCH8
PH-IN-S W SCH9
T i tl e
Si ze Do cu m e n t Nu m b e r Re v
Da te : Sh e e t o f
MSD309 V7.0-A
<02:msd309px>
深圳市鼎科实业有限公司
Cu sto m
3 9 Fri d a y, Ju l y 1 6 , 2 0 1 0
T i tl e
Si ze Do cu m e n t Nu m b e r Re v
Da te : Sh e e t o f
MSD309 V7.0-A
<02:msd309px>
深圳市鼎科实业有限公司
Cu sto m
3 9 Fri d a y, Ju l y 1 6 , 2 0 1 0
T i tl e
Si ze Do cu m e n t Nu m b e r Re v
Da te : Sh e e t o f
MSD309 V7.0-A
<02:msd309px>
深圳市鼎科实业有限公司
Cu sto m
3 9 Fri d a y, Ju l y 1 6 , 2 0 1 0
close to MSD309PX
LVDS CONNECTOR
RESET DEBUG PORT
KEYBOARD
Mode Selection
MSD309PX
LED PCMCIA IO
close to MSD309PX
close to MSD309PX
TS to CI TS back from CI
close to MSD309PX
SERIAL FLASH
EEPROM
0R
C8 6
1 n C8 6
1 n
1
1
2
2
3
3
4
4
5
5
6
6
CN5
CO N6 -DIP/2 .0 M M
CO N6 /2 .0 /W
CN5
CO N6 -DIP/2 .0 M M
CO N6 /2 .0 /W
C6 1
1 5 0 p F C6 1
1 5 0 p F
R7 8
4 .7 K
R7 8
4 .7 K
R5 9 2 2 R R5 9 2 2 R
1
2
3
4 8
7
6
5 RN1
2 2 R RN1
2 2 R
R6 7 2 2 R R6 7 2 2 R
1
2
CN3
CO N2 -DIP/2 .0 M M
CN3
CO N2 -DIP/2 .0 M M
R5 5 4 .7 K R5 5 4 .7 K
C5 8
NC
C5 8
NC
PADA_OUTN_CH[6](PAD_R_ODD[6])
AC25
PADA_OUTP_CH[6](PAD_R_ODD[7])
AC24
PADA_OUTN_CH[7](PAD_R_ODD[4])
AD25
PADA_OUTP_CH[7](PAD_R_ODD[5])
AD24
PADA_OUTN_CH[8](PAD_R_ODD[2])
AC23
PADA_OUTP_CH[8](PAD_R_ODD[3])
AE24
PADA_OUTN_CH[10](PAD_G_ODD[6])
AC22
PADA_OUTP_CH[10](PAD_G_ODD[7])
AE22
PADA_OUTN_CH[9](PAD_R_ODD[0])
AD23
PADA_OUTP_CH[9](PAD_R_ODD[1])
AE23
PADA_OUTN_CH[11](PAD_G_ODD[4])
AD22
PADA_OUTP_CH[11](PAD_G_ODD[5])
AC21
PADA_OUTN_CH[12](PAD_G_ODD[2])
AD21
PADA_OUTP_CH[12](PAD_G_ODD[3])
AC20
PADA_OUTN_CH[13](PAD_G_ODD[0])
AD20
PADA_OUTP_CH[13](PAD_G_ODD[1])
AE20
PADA_OUTN_CH[14](PAD_B_ODD[6])
AC19
PADA_OUTP_CH[14](PAD_B_ODD[7])
AE19
PADA_OUTN_CH[15](PAD_B_ODD[4])
AD19
PADA_OUTP_CH[15](PAD_B_ODD[5])
AC18
PADA_OUTN_CH[16](PAD_B_ODD[2])
AD18
PADA_OUTP_CH[16](PAD_B_ODD[3])
AC17
PADA_OUTN_CH[17](PAD_B_ODD[0])
AD17
PADA_OUTP_CH[17](PAD_B_ODD[1])
AE17
PAD_PWM0
AB25
PAD_PWM1
AB24
PAD_PWM2
E6
PAD_PWM3
D6
PAD_SAR0
J5
PAD_SAR1
G4
PAD_SPI_CK
A2
PAD_SPI_DI
B3
PAD_SPI_DO
A3
DDCA_CK
P6
DDCA_DA
N6
PAD_DDCR_CK
AA23
PAD_DDCR_DA
AA24
PAD_TESTPIN
E11
PAD_GPIO1(AMP_RST)
C7
PAD_GPIO2(INV_CTL)
F4
PAD_GPIO3(PANEL_CTL)
E4
PAD_GPIO4(USB_CTL)
C3
PAD_GPIO_PM0(5V_HDMI_3)
AB8
PAD_GPIO_PM4(POWER_ON_OFF)
C5
PAD_GPIO_PM11(DSUB_DET)
L5
PAD_GPIO_PM6(BOOT_FLASH_CS)
C4
PAD_SPI_CZ(BACKUP_FLASH_CS)
A4
PAD_GPIO_PM8(FLASH_WP)
B2
PAD_IRIN
G5
PAD_XTAL_IN
AD1
PAD_XTAL_OUT
AE2
PAD_RESET
E5
PAD_GND_EFUSE
F11
PAD_TCON0
AA10
PAD_TCON4
AA9
PAD_TCON1(SC1_RE1)
T5
PAD_TCON3(TUNER_RESET)
AB7
PAD_TCON10(HP_DET)
Y8
PAD_DP_P0
C2
PAD_DM_P0
B1
PAD_TCON9(COMP_DET)
R6
PAD_TCON11(HP_MUTE)
Y9
PAD_TCON2(FE_ANT5V_MONITOR)
AB10
PAD_TCON5(SC1_MUTE)
V5
PAD_GPIO_PM12(EDID_WP)
M6
PAD_GPIO_PM5(5V_HDMI_2)
K4
PAD_GPIO5(ERROR_OUT)
D4
PAD_GPIO_PM1(5V_HDMI_1)
H5
PAD_SAR2(POWER_DET)
B4
PAD_GPIO0(NTP_MUTE)
A7
PAD_GPIO12(AMD_SCL)
F6
PAD_GPIO13(AMP_SDA)
F5
PAD_TCON15(SC1_DET)
T4
PAD_TCON7(SIDE_AV_DET)
AA8
PAD_TCON6(PCM_5V_CTL)
AC11
PAD_SAR3
AA7
PAD_DP_P1
AD11
PAD_DM_P1
AE11
P W M
S A R
S P I
U A R T /I 2 C S
I 2 C M
G P I O
L V D S
G P I O _P M
I R
X T A L
R ESET
G PI O _T C O N
U SB
U7 D M SD3 0 9 PX
P W M
S A R
S P I
U A R T /I 2 C S
I 2 C M
G P I O
L V D S
G P I O _P M
I R
X T A L
R ESET
G PI O _T C O N
U SB
U7 D M SD3 0 9 PX
C6 2 0 .1 u _ X C6 2 0 .1 u _ X
R9 9 NC/1 0 K R9 9 NC/1 0 K
R8 5 1 0 k R8 5 1 0 k
C5 7
2 .2 u C5 7
2 .2 u
1
3
2
Q9
3 9 0 6 Q9
3 9 0 6
R5 3 6 8 R R5 3 6 8 R
C8 2
0 .1 u C8 2
0 .1 u
R4 9 2 .2 K R4 9 2 .2 K
C6 0 0 .1 u _ X C6 0 0 .1 u _ X
C8 0
1 0 0 p F
C8 0
1 0 0 p F
R5 4 4 .7 K R5 4 4 .7 K
1
2
3
4 8
7
6
5 RN1 5
0 R RN1 5
0 R
C7 7
3 9 P C7 7
3 9 P
R6 3
1 0 0 K R6 3
1 0 0 K
R6 4 2 2 R R6 4 2 2 R
L 9
FB 2 2 0 /1 0 0 m A
L 9
FB 2 2 0 /1 0 0 m A
1
2
3
4 8
7
6
5 RN6
2 2 R RN6
2 2 R
R8 0
1 0 0 K
R8 0
1 0 0 K
R4 8 2 .2 K R4 8 2 .2 K
A0
1
A1
2
A2
3
GND
4
SDA
5
SCL
6
WP
7
VCC
8
U9
2 4 C3 2 /NC
U9
2 4 C3 2 /NC
1
2
3
4 8
7
6
5 RN2
2 2 R RN2
2 2 R
R7 6
1 0 k R7 6
1 0 k
L 1 0
1 2 0 n H
L 1 0
1 2 0 n H
1
2
3
4 8
7
6
5 RN9
2 2 R RN9
2 2 R
R7 3
1 0 K/NC
R7 3
1 0 K/NC
1
2
3
4 8
7
6
5 RN1 0
2 2 R RN1 0
2 2 R
R6 0 2 2 R R6 0 2 2 R
1
2
D4
ESD-0 4 0 2 D4
ESD-0 4 0 2
PAD_PCM_D[0]
W21
PAD_PCM_D[1]
U21
PAD_PCM_D[2]
U19
PAD_PCM_D[3]
AD12
PAD_PCM_D[4]
AC12
PAD_PCM_D[5]
AD13
PAD_PCM_D[6]
Y12
PAD_PCM_D[7]
AA11
PAD_PCM_A[0]
Y24
PAD_PCM_A[1]
Y22
PAD_PCM_A[2]
AB22
PAD_PCM_A[3]
AA22
PAD_PCM_A[4]
AA20
PAD_PCM_A[5]
Y21
PAD_PCM_A[6]
AA18
PAD_PCM_A[12]
AA17
PAD_PCM_A[8]
AA16
PAD_PCM_A[9]
AA14
PAD_PCM_A[11]
Y15
PAD_PCM_A[13]
AA15
PAD_PCM_A[10]
AA12
PAD_PCM_A[7]
AA19
PAD_TS1_CLK
Y18
PAD_TS1_SYNC
AB16
PAD_TS1_VLD
AE16
PAD_TS1_D[0]
Y16
PAD_TS1_D[1]
AD14
PAD_TS1_D[2]
AD15
PAD_TS1_D[3]
AC15
PAD_TS1_D[4]
AC16
PAD_TS1_D[5]
Y17
PAD_TS1_D[6]
AB17
PAD_TS1_D[7]
AB19
PAD_TS0_CLK
Y19
PAD_TS0_SYNC
W20
PAD_TS0_VLD
Y23
PAD_TS0_D[0]
U20
PAD_TS0_D[1]
V20
PAD_TS0_D[2]
R19
PAD_TS0_D[3]
AE13
PAD_TS0_D[4]
AC13
PAD_TS0_D[5]
Y11
PAD_TS0_D[6]
AB11
PAD_TS0_D[7]
AB13
PAD_IP
AA3
PAD_IM
AA2
PAD_QP
Y3
PAD_QM
Y2
PAD_TGPIO0(RF_AGC_CTRL)
AC4
PAD_TGPIO1(DEMOD_RESET)
AD2
PAD_TGPIO2(TUNER_SCL)
AD4
PAD_TGPIO3(TUNER_SDA)
AE4
PAD_IFAGC
AD3
PAD_VIFP
AB1
PAD_VIFM
AA1
PAD_RFAGC_TAGC
AE3
PAD_SIFM
AB3
PAD_SIFP
AB2
PAD_PCM_RESET
Y20
PAD_PCM_A[14]
AE14
PAD_PCM_IRQA_N
AD16
PAD_PCM_OE_N
Y13
PAD_PCM_IORD_N
Y14
PAD_PCM_CE_N
AA13
PAD_PCM_WE_N
AC14
PAD_PCM_CD_N
AB23
PAD_PCM_WAIT_N
AB20
PAD_PCM_IOWR_ N
AB14
PAD-PCM_REG_N
AA21
PAD_PF_ALE
T21
PAD_PF_AD[15]
T19
PAD_PF_CE0Z
P21
PAD_PF_CE1Z
P20
PAD_PF_OEZ
R20
PAD_PF_WEZ
T20
PAD_F_RBZ
P19
PAD_PCM2_CE_N
Y25
T S1
T S0
PC M C I A
N A N D F L A SH
F R O N T EN D
U7 B M SD3 0 9 PX
T S1
T S0
PC M C I A
N A N D F L A SH
F R O N T EN D
U7 B M SD3 0 9 PX
C7 4
1 0 0 n F C7 4
1 0 0 n F
R4 7 1 0 0 R R4 7 1 0 0 R
C5 9
NC C5 9
NC
3
1 2
D5
BAV9 9 D5
BAV9 9
C8 5
2 .2 u C8 5
2 .2 u
R5 7 2 2 R R5 7 2 2 R
C6 9 4 7 n C6 9 4 7 n
C5 6
2 .2 u C5 6
2 .2 u
R5 8 2 2 R R5 8 2 2 R
1
2
D3
ESD-0 4 0 2 D3
ESD-0 4 0 2
HOLD
1
VCC
2
NC1
3
NC2
4
NC3
5
NC4
6
SO16-CS
7
DO
8
WP/Vpp
9
VSS
10
NC5
11
NC6
12
NC7
13
NC8
14
DI
15
CLK
16
S
OP
8-CS
17
S
OP
8-DO
18
S
OP
8-W
P
/V
pp
19
V
S
S
20
S
OP
8-DI
21
S
OP
8-CLK
22
S
OP
8-HO
LD
23
S
OP
8-V
CC
24
SOIC8
208mil
U8
M X2 5 L 3 2 0 5 DM 2 I-1 2 G
SOIC8
208mil
U8
M X2 5 L 3 2 0 5 DM 2 I-1 2 G
R4 2 0 R R4 2 0 R
R5 0
1 K R5 0
1 K
C8 4
0 .1 u
C8 4
0 .1 u
C8 3
1 0 0 n F
C8 3
1 0 0 n F
1
2
3
4
CN6
CO N4 -2.0 m m
De b u g Po rt
CN6
CO N4 -2.0 m m
De b u g Po rt
R8
6
1
0
K
R8
6
1
0
K
R8 1 1 0 K R8 1 1 0 K
1
2
3
4 8
7
6
5 RN4
2 2 R RN4
2 2 R
1
2
3
4 8
7
6
5 RN3
2 2 R RN3
2 2 R
T P8 T P8
R7 7
1 0 k R7 7
1 0 k
C6 3
0 .1 u C6 3
0 .1 u
R7 2
1 0 K/NC
R7 2
1 0 K/NC
C6 7 2 2 PF/NC C6 7 2 2 PF/NC
R6 5 2 2 R R6 5 2 2 R
R9 3 1 0 K R9 3 1 0 K
R8 2 NC/1 0 K R8 2 NC/1 0 K
R9 0 1 0 K R9 0 1 0 K
C7 3
2 2 p F/NC C7 3
2 2 p F/NC
R7 5
3 3 0
R7 5
3 3 0
R8 7
4 .7 K
R8 7
4 .7 K
R6 8
4 .7 K
R6 8
4 .7 K
R9 4 1 0 K R9 4 1 0 K
R7 4
3 3 0
R7 4
3 3 0
1
2
3
4 8
7
6
5 RN1 8
0 R RN1 8
0 R
C6 6
4 7 n
C6 6
4 7 n
T P1 0 T P1 0
T P1 1 T P1 1
PAD_LINEIN_L0
R4
PAD_LINEIN_R0
R5
PAD_LINEIN_L1
T6
PAD_LINEIN_R1
U6
PAD_LINEIN_L2
V6
PAD_LINEIN_R2
U5
PAD_LINEIN_L5
AD6
PAD_LINEIN_R5
AC6
PAD_RX0N_A
G2
PAD_RX0P_A
H3
PAD_RX1N_A
H2
PAD_RX1P_A
J3
PAD_RX2N_A
J2
PAD_RX2P_A
J1
PAD_RXCN_A
G3
PAD_RXCP_A
G1
DDCDA_CK
M4
DDCDA_DA
M5
PAD_HOTPLUGA
K6
PAD_RX0N_B
D2
PAD_RX0P_B
E3
PAD_RX1N_B
E2
PAD_RX1P_B
F3
PAD_RX2N_B
F2
PAD_RX2P_B
F1
PAD_RXCN_B
D3
PAD_RXCP_B
D1
DDCDB_CK
J6
DDCDB_DA
L6
HOTPLUGB
J4
PAD_RX0N_C
AC8
PAD_RX0P_C
AD9
PAD_RX1N_C
AC9
PAD_RX1P_C
AD10
PAD_RX2N_C
AE10
PAD_RX2P_C
AC10
PAD_RXCN_C
AE8
PAD_RXCP_C
AD8
DDCDC_CK
AE7
DDCDC_DA
AD7
PAD_HOTPLUGC
AC7
PAD_CEC
K5
PAD_LINEOUT_L0
V1
PAD_LINEOUT_R0
V2
PAD_EARPHONE_OUTL
AD5
PAD_EARPHONE_OUTR
AE5
PAD_VRP
AB4
PAD_VAG
AB5
AVSS_VRM_ADC_DAC
AC3
PAD_I2S_OUT_MCK
A6
PAD_I2S_OUT_SD
B5
PAD_I2S_OUT_WS
B6
PAD_I2S_IN_BCK(USB_OCD)
C1
PAD_I2S_IN_SD(LED_ON)
H6
PAD_I2S_IN_WS(WARM_LED_ON)
G6
PAD_SPDIF_OUT
P5
PAD_I2S_OUT_BCK
C6
PAD_LINEOUT_L3
AA6
PAD_LINEOUT_R3
Y5
H D M I A U D I O
I 2 S
S P D I F
U7 C M SD3 0 9 PX
H D M I A U D I O
I 2 S
S P D I F
U7 C M SD3 0 9 PX
C7 8
3 3 p F C7 8
3 3 p F
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
26
24
22
28
30
21
23
25
27
29
31
32
33 34
CN4
3 4 Pi n -PDIP/2 .0 M M _ L VDS
CN4
3 4 Pi n -PDIP/2 .0 M M _ L VDS
L 1 2
FB /1 2 0 o h m /0 .2 A
L 1 2
FB /1 2 0 o h m /0 .2 A
R4 3
1 0 k R4 3
1 0 k
AVDD_DDRA
F18
AVDD_DDRB
J16
AVDD_DVI
E9
AVDD_DVI
E10
VDDC1.2V
E22
VDDC1.2V
F22
VDDC1.2V
E21
AVDD2P5_ADC
M9
AVDD_AU25
R9
AVDD_AU33
K9
AVDD_EAR33
J9
AVDD25_REF
N8
AVDD25_PGA
T8
AVDD_DDRA
E17
AVDD_DDRB
G16
VDDP
E19
AVDD25_MOD
P8
AVDD_DDRA
E18
AVDD_DDRB
H16
AVDD_DDRA
F17
AVDD_DDRB
H17
AVDD25_MOD
P9
AVDD1P2
J21
VDDP
F19
AVDD2P5_ADC
M8
DVDD_MIUA
H20
DVDD_MIUB
J20
AVDD_LPLL_MEMPLL
G18
AVSS_PGA
U8
AVDD_DDRA
G17
AVDD_DDRB
J17
VDDC1.2V
F21
VDDC1.2V
G21
VDDC1.2V
H21
VDDC1.2V
E20
VDDC1.2V
F20
VDDC1.2V
G20
VDDC1.2V
G22
AVDD25_REF
N9
DVDD_NODIE
L10
AVDD_DVI
F9
AVDD_DVI
F10
AVDD_DVI
G9
AVDD_DMPLL
G10
AVDD3P3_ADC
H9
AVDD3P3_ADC
H10
GND
V7
GND
W7
GND
V8
GND
W8
GND
V9
GND
W9
GND
J10
GND
K10
GND
M10
GND
N10
GND
P10
GND
R10
GND
T10
GND
U10
GND
V10
GND
W10
GND
D11
GND
G11
GND
H11
GND
J11
GND
K11
GND
L11
GND
M11
GND
N11
GND
P11
GND
R11
GND
T11
GND
U11
GND
V11
GND
W11
GND
D12
GND
E12
GND
F12
GND
G12
GND
H12
GND
J12
GND
K12
GND
L12
GND
M12
GND
N12
GND
P12
GND
R12
GND
T12
GND
U12
GND
V12
GND
W12
GND
D13
GND
E13
GND
F13
GND
H13
GND
J13
GND
K13
GND
L13
GND
M13
GND
N13
GND
P13
GND
R13
GND
T13
GND
U13
GND
D14
GND
E14
GND
F14
GND
G14
GND
H14
GND
J14
GND
K14
GND
L14
GND
M14
GND
N14
GND
P14
GND
R14
GND
T14
GND
U14
GND
D15
GND
E15
GND
F15
GND
G15
GND
H15
GND
J15
GND
K15
GND
L15
GND
M15
GND
N15
GND
P15
GND
R15
GND
T15
GND
U15
GND
D16
GND
E16
GND
F16
GND
K16
GND
L16
GND
M16
GND
N16
GND
P16
GND
R16
GND
T16
GND
U16
GND
K17
GND
L17
GND
M17
GND
N17
GND
P17
GND
R17
GND
T17
GND
U17
GND
K18
GND
L18
GND
M18
GND
N18
GND
P18
GND
R18
GND
T18
GND
U18
GND
K19
GND
L19
GND
M19
GND
N19
GND
N20
GND
M20
GND
L20
GND
K20
GND
N21
GND
M21
GND
L21
GND
K21
GND
N22
GND
M22
GND
L22
GND
K22
GND
J22
GND
H22
GND
Y10
GND
AC2
GND
AE1
U7 F M SD3 0 9 PX U7 F M SD3 0 9 PX
C6 8
4 7 n C6 8
4 7 n
R6 9 1 K R6 9 1 K
1
2
3
4 8
7
6
5 RN1 3
0 R RN1 3
0 R
PADA_BIN0M
K1
PADA_GIN0P
L3
PADA_GIN0M
L2
PADA_SOGIN0
K2
PADA_RIN0M
M2
PAD_HSYNC0
N4
PAD_VSYNC0
N5
PADA_BIN1M
N3
PADA_GIN1P
N2
PADA_SOGIN1
N1
PADA_RIN1M
R3
PAD_HSYNC1
W6
PAD_VSYNC1
Y6
PADA_BIN2M
R1
PADA_GIN2M
T2
PADA_RIN2M
U2
PADA_SOGIN2
T3
PAD_HSYNC2
V4
PADA_RIN0P
M3
PADA_BIN0P
K3
PADA_RIN1P
P2
PADA_GIN1M
P3
PADA_BIN1P
M1
PADA_RIN2P
U3
PADA_GIN2P
T1
PADA_BIN2P
R2
PADA_CVBS0
AC5
PADA_CVBS4
W2
PADA_CVBS5
W3
PADA_CVBS_OUT1
V3
PADA_VCOM
W1
PADA_CVBS1
W4
PADA_CVBS2
W5
PADA_CVBS_OUT2
AA4
PADA_CVBS3
AA5
R G B C V B S
U7 E M SD3 0 9 PX
R G B C V B S
U7 E M SD3 0 9 PX
C7 5
2 .2 u
C7 5
2 .2 u
1
2
3
4 8
7
6
5 RN7
2 2 R RN7
2 2 R
C8 1
1 0 0 p F
C8 1
1 0 0 p F
1
2
3 Y1
2 4 M HZ
Y1
2 4 M HZ
R9 1 NC/1 0 K R9 1 NC/1 0 K
C6 4 0 .1 u C6 4 0 .1 u
T P9 T P9
R8 8
4 .7 K R8 8
4 .7 K
C7 2 2 2 PF/NC C7 2 2 2 PF/NC
1
2
3
4 8
7
6
5 RN1 2
2 2 R RN1 2
2 2 R
1
2
3
4 8
7
6
5
RN1 7
0 R RN1 7
0 R
R8
3
1
0
K
R8
3
1
0
K
R5 2 1 0 k R5 2 1 0 k
1
2
3
4 8
7
6
5 RN8
2 2 R RN8
2 2 R
R5 6 2 2 R R5 6 2 2 R
R9 8 1 0 K R9 8 1 0 K
R6 6 2 2 R R6 6 2 2 R
L 1 1
FB /1 2 0 o h m /0 .2 A
L 1 1
FB /1 2 0 o h m /0 .2 A
1
2
D2
ESD-0 4 0 2 D2
ESD-0 4 0 2
R7 0
1 M R7 0
1 M
C6 5 0 .1 u C6 5 0 .1 u
R5 1
1 0 K
R5 1
1 0 K
R6 2
1 0 0 K/NC R6 2
1 0 0 K/NC
C7 0
0 .1 u
C7 0
0 .1 u
R4 6
1 K/NC
R4 6
1 K/NC
T P2 8 T P2 8
1
2
3
4 8
7
6
5 RN1 4
0 R RN1 4
0 R
C7 6
3 3 p F
C7 6
3 3 p F
R7 1
0 R
R7 1
0 R
R4 4 0 R R4 4 0 R R4 5 1 0 0 R R4 5 1 0 0 R
R9 5 NC/1 0 K R9 5 NC/1 0 K
1
2
3
4 8
7
6
5
RN1 1
2 2 R RN1 1
2 2 R
R9 6 2 2 R R9 6 2 2 R
T P3 0 T P3 0
R9 7 1 0 0 R R9 7 1 0 0 R
R7 9
4 .7 K
R7 9
4 .7 K
C7 1
1 0 0 n F_ X C7 1
1 0 0 n F_ X
1
2
3
4 8
7
6
5 RN1 6
0 R RN1 6
0 R
T P2 3 T P2 3
C7 9 1 u F C7 9 1 u F
R6 1 2 2 R R6 1 2 2 R
1
2
3
4 8
7
6
5 RN5
2 2 R RN5
2 2 R
PAD_IO[8](A_A0)
C10
PAD_IO[41](A_A1)
A22
PAD_IO[5](A_A2)
A9
PAD_IO[44](A_A3)
B23
PAD_IO[3](A_A4)
B9
PAD_IO[43](A_A5)
A23
PAD_IO[6](A_A6)
C9
PAD_IO[45](A_A7)
C23
PAD_IO[4](A_A8)
B8
PAD_IO[46](A_A9)
A24
PAD_IO[42](A_A10)
B22
PAD_IO[2](A_A11)
C8
PAD_IO[35](A_A12)
B24
PAD_IO[14](A_DQ0)
C13
PAD_IO[32(A_DQ1)
A19
PAD_IO[15](A_DQ2)
A12
PAD_IO[33](A_DQ3)
B19
PAD_IO[34](A_DQ4)
C20
PAD_IO[13](A_DQ5)
B12
PAD_IO[31](A_DQ6]
C19
PAD_IO[17](A_DQ7)
A13
PAD_IO[18](A_DQ8)
B14
PAD_IO[29](A_DQ9)
C18
PAD_IO[19](A_DQ10)
C14
PAD_IO[30](A_DQ11)
A18
PAD_IO[28](A_DQ12)
B18
PAD_IO[16](A_DQ13)
B13
PAD_IO[27](A_DQ14)
B17
PAD_IO[20](A_DQ15)
C15
PAD_IO[23](A_DQS0)
A16
PAD_IO[24](A_DQS0B)
C16
PAD_IO[21](A_DQS1)
A15
PAD_IO[22](A_DQS1B)
B15
MVREF
D22
PAD_IO[26](A_DQM0)
B16
PAD_IO[25](A_DQM1)
C17
PAD_IO[12](A_MCLK)
C12
PAD_IO[10](A_MCLKZ)
B11
PAD_IO[37](A_CKE)
C21
PAD_IO[36](A_WEZ)
B20
PAD_IO[9](A_RASZ)
B10
PAD_IO[7](A_CASZ)
A10
PAD_IO[39](A_BA0)
A21
PAD_IO[38](A_BA1)
B21
PAD_IO[40](A_BA2)
C22
PAD_IO[11](A_ODT)
C11
PAD_IO[55](B_A0)
E23
PAD_IO[88](B_A1)
U24
PAD_IO[52](B_A2)
D24
PAD_IO[91](B_A3)
V25
PAD_IO[50](B_A4)
D25
PAD_IO[90](B_A5)
V24
PAD_IO[53](B_A6)
D23
PAD_IO[92](B_A7)
W25
PAD_IO[51](B_A8)
C25
PAD_IO[93](B_A9)
W24
PAD_IO[89](B_A10)
V23
PAD_IO[49](B_A11)
C24
PAD_IO[82](B_A12)
W23
PAD_IO[61](B_DQ0)
H23
PAD_IO[79](B_DQ1)
P24
PAD_IO[62](B_DQ2)
G24
PAD_IO[80](B_DQ3)
R23
PAD_IO[81](B_DQ4)
R24
PAD_IO[60](B_DQ5)
G25
PAD_IO[78](B_DQ6)
P23
PAD_IO[64](B_DQ7)
H24
PAD_IO[65](B_DQ8)
J25
PAD_IO[76](B_DQ9)
N23
PAD_IO[66](B_DQ10)
J24
PAD_IO[77](B_DQ11)
N24
PAD_IO[75](B_DQ12)
N25
PAD_IO[63](B_DQ13)
J23
PAD_IO[74](B_DQ14)
M25
PAD_IO[67](B_DQ15)
K23
PAD_IO[70](B_DQS0)
L24
PAD_IO[71](B_DQS0B)
L23
PAD_IO[68](B_DQS1)
K24
PAD_IO[69](B_DQS1B)
K25
PAD_IO[73](B_DQM0)
M23
PAD_IO[72](B_DQM1)
M24
PAD_IO[59](B_MCLK)
G23
PAD_IO[57](B_MCLKZ)
F25
PAD_IO[84](B_CKE)
T23
PAD_IO[83](B_WEZ)
R25
PAD_IO[56](B_RASZ)
F23
PAD_IO[54](B_CASZ)
E24
PAD_IO[86](B_BA0)
T24
PAD_IO[85](B_BA1)
T25
PAD_IO[87](B_BA2)
U23
PAD_IO[58](B_ODT)
F24
PAD_IO[0](A_A13)
B7
PAD_IO[47](B_A13)
B25
M I U A M I U B
U7 A M SD3 0 9 PX
M I U A M I U B
U7 A M SD3 0 9 PX
R8 4 NC/1 0 K R8 4 NC/1 0 K
R9 2 2 2 R R9 2 2 2 R
R1 0 0
1 0 0 K R1 0 0
1 0 0 K
R8 9
1 0 K R8 9
1 0 K
1
2
3
4
5
6
7
SHIEL D-8 0 X1
CO N7
SHIEL D-8 0 X1 CO N7
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