Sharp LC-20B6US Operation, Руководство по обслуживанию

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LC-20B6U-S
42
Dig C in [0] I D
Dig CLK in I D
Dig HD in I D
Dig VD in I D
Dig Field in I D
Digital out R656 out 12 Dig out [7] O D ITU-R656 OUTPUT PIN
YCbCr Dig out [6] O D Digital YCbCr 8-bit OUTPUT PIN
8bit out Dig out [5] O D
Dig out [4] O D
Dig out [3] O D
Dig out [2] O D
Dig out [1] O D
Dig out [0] O D
Dig CLK out O D
Dig HD out O D
Dig VD out O D
Dig Field out O D
OSD OSD I/F 14 OSDRA(d1a) in I D OSD-R (data-1a) SIGNAL INPUT PIN
OSDGA(d2a) in I D OSD-G (data-2a) SIGNAL INPUT PIN
OSDBA(d3a) in I D OSD-B (data-3a) SIGNAL INPUT PIN
OSDIA(d4a) in I D OSD-I (data-4a) SIGNAL INPUT PIN
OSDYsA in I D OSD-Ys SIGNAL INPUT PIN
OSDRB(d1b) in I D OSD-R (data-1b) SIGNAL INPUT PIN
OSDGB(d2b) in I D OSD-G (data-2b) SIGNAL INPUT PIN
OSDBB(d3b) in I D OSD-B (data-3b) SIGNAL INPUT PIN
OSDIB(d4b) in I D OSD-I (data-4b) SIGNAL INPUT PIN
OSDYsB in I D OSD-Ys SIGNAL INPUT PIN
OSD VD out O D VD OUTPUT FOR OSD µ COM
OSD HD out O D HD OUTPUT FOR OSD µ COM
OSD CLK I/O D CLOCK I/O FOR OSD µ COM (POSITIVE POLARITY)
OSD n-CLK I/O D CLOCK I/O FOR OSD µ COM (NEGATIVE POLARITY)
DRAM DRAM 20 DTMB I D DRAM TEST MODE INPUT
DTCLK I D DRAM TEST CLOCK INPUT
DRAM 1 VDD 1 VDD 1.5V VDD FOR 4M DRAM
DRAM 1 GND 1 GND 1.5V GND FOR 4M DRAM
DRAM 1 VDD2 VDD 1.5V VDD FOR 4M DRAM
DRAM 1 GND2 GND 1.5V GND FOR 4M DRAM
DRAM 1 VDD3 VDD 1.5V VDD FOR 4M DRAM
DRAM 1 GND3 GND 1.5V GND FOR 4M DRAM
DRAM2 VDD 1 VDD 1.5V VDD FOR 20M DRAM
DRAM2 GND 1 GND 1.5V GND FOR 20M DRAM
DRAM2 VDD2 VDD 1.5V VDD FOR 20M DRAM
DRAM2 GND2 GND 1.5V GND FOR 20M DRAM
DRAM2 VDD3 VDD 1.5V VDD FOR 20M DRAM
DRAM2 GND3 GND 1.5V GND FOR 20M DRAM
DRAM2 VDD4 VDD 1.5V VDD FOR 20M DRAM
DRAM2 GND4 GND 1.5V GND FOR 20M DRAM
DRAM2 VDD5 VDD 1.5V VDD FOR 20M DRAM
DRAM2 GND5 GND 1.5V GND FOR 20M DRAM
DRAM2 VDD6 VDD 2.5V VDD FOR 20M DRAM
DRAM2 GND6 GND 2.5V GND FOR 20M DRAM
B/E LCD I/F 53 RED 1 [7] O D R SIGNAL OUTPUT PIN 1 (8bit)
RED 1 [6] O D
RED 1 [5] O D