© by SEMIKRON / 2020-05-25 / Technical Explanation / SKYPER
®
12 PV
PROMGT.1026/ Rev.7/ Template Technical Explanation
Page 27/37
Recommended values
Component
Value
Remark
C
1
≤1nF
Optional filter capacitors suppressing high-frequency
interfering signals.
C
CFG
-
Dimensioning according to chapter 5.5.2
D
VCE
-
-
The diode must block V
CEmax
, when the IGBT switches off
-
The diode must provide functional insulation
-
Revers recovery charge of the diode causes additional
pulse loads at R
VCE
R
1_CFG
~30kΩ
Dimensioning according to chapter 5.5.2
R
2_CFG
-
Dimensioning according to chapter 5.5.2
R
G(on)
-
Dimensioning according to chapter 4.10
R
VCE
511Ω
Resistor should be surge proof
5.5.1
DSCP | Functional description
As long as the driver keeps the connected semiconductor in off-state the high voltage diode D
VCE
is
operating in reverse direction. The voltage V
CE(IN)
at the VCE_IN pin is set to 10V by the voltage divider of
R
1
and R
2
. The CFG_VCE pin is internally shorten to PWR_VS_P and pulls the voltage V
CE(ref)
at the
CFG_VCE pin to PWR_VS_P. Hence, the output of the internal comparator is forced to its negative rail
voltage.
When the driver initiates the turn-on process of the semiconductor the internal bypass will be interrupted
and the capacitor C
CFG
discharges until the voltage level, defined by the voltage divider of R
1_CFG
and R
2_CFG
,
is reached. The trip level during the on-state of the semiconductor has reached its static level
(V
CE(ref)
= V
CE(stat)
).
Simultaneously to the discharging process of the capacitor C
CFG
the semiconductor starts conducting and
reducing the collector-emitter voltage V
CE
to V
CEsat
. When the Collector-Emitter voltage of the IGBT falls
below 10V the high-voltage diode D
VCE
is starting to operate in forward direction. Now, the voltage V
CE(IN)
at
the VCE_IN pin follows the collector-emitter voltage of the semiconductor with an offset caused by the
forward current I
F
of the high-voltage diode D
VCE
multiplied by the resistance of R
VCE
plus the voltage drop
V
F
of the high-voltage diode.
The DSCP feature is active from the moment the voltage V
CE(ref)
at the CFG_VCE pin is below 10V. The time
elapsed from initiating the turn-on process of the semiconductor until the DSCP feature is activated is
called blanking time t
bl(VCE)
.
In active state the DSCP triggers an error event, if the voltage V
CE(IN)
at the VCE_IN pin exceeds the
voltage V
CE(ref)
of the CFG_VCE pin.
Figure 19 shows on the left side the above described process for a well-configured blanking time t
bl(VCE)
and
static threshold voltage V
CE(stat).
The upper right side of Figure 19 shows a desaturation event of an IGBT during the DSCP feature is active.
In the moment when the voltage V
CE(IN)
exceeds the threshold voltage V
CE(ref)
the driver enters into error
state.
The lower right side shows an error condition, caused by a too short determined blanking time t
bl(VCE)
. The
threshold voltage V
CE(ref)
has already fallen below 10V before the monitored voltage V
CE(IN)
is below that
level.
