SM-B71
SMARC Rel. 2.0 compliant module with the
Xilinx
®
Zynq
Ult MPSoC
Страница 1: ...SM B71 SMARC Rel 2 0 compliant module with the Xilinx Zynq Ultrascale MPSoC...
Страница 2: ...or omissions herein SECO S p A reserves the right to change precise specifications without prior notice to supply the best product possible For further information on this module or other SECO product...
Страница 3: ...licy 8 1 8 Terminology and definitions 9 1 9 Reference specifications 11 OVERVIEW 12 2 1 Introduction 13 2 2 Technical Specifications 14 2 3 Electrical Specifications 15 2 3 1 Power Consumption 15 2 3...
Страница 4: ...0 Last Edition 1 1 Authors S B Reviewed by C M Copyright 2020 SECO S p A 4 Warranty Information and assistance RMA number request Safety Electrostatic Discharges RoHS compliance Safety Policy Termino...
Страница 5: ...RMA The RMA authorisation number must be put both on the packaging and on the documents shipped with the items which must include all the accessories in their original packaging with no signs of damag...
Страница 6: ...is possible to send the faulty product to the SECO Repair Centre In this case follow this procedure o Returned items must be accompanied by a RMA Number Items sent without the RMA number will be not a...
Страница 7: ...ng RoHS compliant components and is manufactured on a lead free production line It is therefore fully RoHS compliant Always switch the power off and unplug the power supply unit before handling the bo...
Страница 8: ...st be performed an analysis for the reduction of the likelihood of ignition in single fault condition according clause 6 4 1 of the standard used along with CPU Heatspreader heatsinks designed accordi...
Страница 9: ...y I2S Inter Integrated Circuit Sound an audio serial bus protocol interface developed by Philips now NXP in 1986 LVDS Low Voltage Differential Signalling a standard for transferring data at very high...
Страница 10: ...SGMII Serial Gigabit Media Independent Interface a standard interface between the Ethernet Media Access Control MAC and the Physical Layer PHY SM Bus System Management Bus a subset of the I2C bus ded...
Страница 11: ...2SBUS pdf LVDS http www ti com lit an snla165 snla165 pdf and http www ti com lit pdf SNLA187 MIPI http www mipi org MMC eMMC http www jedec org committees jc 64 OpenGL http www opengl org OpenVG http...
Страница 12: ...ev First Edition 1 0 Last Edition 1 1 Authors S B Reviewed by C M Copyright 2020 SECO S p A 12 Introduction Technical Specifications Electrical Specifications Mechanical Specifications Supported Opera...
Страница 13: ...d DP video interfaces up to 4K resolution and high speed interfaces The module offers a very high level of integration both for all most common used peripherals in the ARM domain and for bus interface...
Страница 14: ...ammable logic Mass Storage 1x S ATA Gen3 Channel Optional eMMC 4 51 Drive soldered on board SD 4 bit interface QuadSPI Flash PCI Express PCI e x4 Gen3 interface Networking Up to 2x Gigabit Ethernet in...
Страница 15: ...ings In all the tables contained in this manual Power rails are named with the following meaning VDD_IN Module power input voltage Electrical voltage in the range 3V 5 25VDC directly coming from the c...
Страница 16: ...consider that according to SMARC specifications components placed on bottom side of SM B71 will have a maximum height of 1 3mm Keep this value in mind when choosing the MXM connector s height if there...
Страница 17: ...cessing System DDR4 Memory Programmable Logic DDR4 Memory Power section 3 3V_RTC 2 x RGMII SGMII LVDS DP Gigabit Ethernet 0 Gigabit Ethernet 1 2 x CAN 4 x UARTS 2 x SPI 1 x USB 2 0 1 x SATA PCI e x4 2...
Страница 18: ...SM B71 SM B71 User Manual Rev First Edition 1 0 Last Edition 1 1 Authors S B Reviewed by C M Copyright 2020 SECO S p A 18 Introduction Connectors description...
Страница 19: ...card edge connector An additional connector CN2 is available for JTAG programming of the Zynq Ultrascale processor more specifically it is used for chip level JTAG functions Arm processor code downloa...
Страница 20: ...fective signals implemented For accurate signals description please consult the following paragraphs SMARC Golden Finger Connector CN4 TOP SIDE BOTTOM SIDE SIGNAL GROUP Type Pin name Pin nr Pin nr Pin...
Страница 21: ..._D_TX O PCI_e GBE I O GBE0_MDI0 P29 S30 PCIE_D_TX O PCI_e GBE I O GBE0_MDI0 P30 S31 GBE1_LINK_ACT O GBE SPI_INTERFACE O SPI0_CS1 P31 S32 PCIE_D_RX I PCI_e GND P32 S33 PCIE_D_RX I PCI_e SDIO_CARD I SDI...
Страница 22: ...I_INTERFACE SPI_INTERFACE I O ESPI_IO_1 P57 S58 ESPI_RESET O SPI_INTERFACE SPI_INTERFACE I O ESPI_IO_0 P58 S59 N C GND P59 S60 N C USB I O USB0 P60 S61 GND USB I O USB0 P61 S62 USB3_SSTX O USB USB I O...
Страница 23: ...O PCIE_A_TX P89 S90 PCIE_B_TX O PCI_e PCI_e O PCIE_A_TX P90 S91 PCIE_B_TX O PCI_e GND P91 S92 GND CAMERA I O CSI2_RX2 P92 S93 DP0_LANE0 O DP CAMERA I O CSI2_RX2 P93 S94 DP0_LANE0 O DP GND P94 S95 N C...
Страница 24: ...10 P118 S119 GND GPIO I O GPIO11 P119 S120 LVDS1_3 O PRIMARY_DISPLAY GND P120 S121 LVDS1_3 O PRIMARY_DISPLAY MANAGEMENT I O I2C_PM_CK P121 S122 LCD1_BKLT_PWM O LCD_SUPPORT MANAGEMENT I O I2C_PM_DAT P1...
Страница 25: ...C GND P142 S143 GND CAN O CAN0_TX P143 S144 eDP0_HPD I GENERAL PURPOSE CAN I CAN0_RX P144 S145 WDT_TIME_OUT O WATCHDOG CAN O CAN1_TX P145 S146 PCIE_WAKE I PCI_e CAN I CAN1_RX P146 S147 VDD_RTC VDD_IN...
Страница 26: ...ness in displays supporting Pulse Width Modulated PWM regulations 1 8V_S electrical level Output I2C_LCD_DAT LCD I2C Data This signal is used to read the LCD display EDID EEPROM 1 8V_S electrical leve...
Страница 27: ...upports two lanes the CSI1 interface supports 4 lanes CSI0_CK CSI0_CK 2 lane CSI Input Clock Differential Pair CSI0_RX0 CSI0_RX0 2 lane CSI Input Differential Pair 0 CSI0_RX1 CSI0_RX1 2 lane CSI Input...
Страница 28: ...d to the Host SDIO_CD Card Detect Input Active Low Signal electrical level 3 3V_S with 10k pull up resistor This signal must be externally pulled low to signal that a SDIO MMC Card is present SDIO_CK...
Страница 29: ...n the FPGA it is possible to have two I2S Audio interfaces here are following the signals related to them AUDIO_MCK Master clock output to Audio codec Output from the module to the Carrier board elect...
Страница 30: ...ace Serial data Receive input line 1 8V_S electrical level SER3_TX UART 3 Interface Serial data Transmit output line 1 8V_S electrical level A fourth UART interface is present only when the module is...
Страница 31: ..._OC Power Enable and over current monitoring function Active Low Output signal 3 3V_S electrical level with a 10k pull up resistor Refer to SMARC 2 0 Specification for over current operation informati...
Страница 32: ...IE_B_REFCK PCIE_B_REFCK PCI Express Reference Clock for lane 1 Differential Pair PCIE_B_RST Reset Signal that is sent from SMARC Module to a PCI e device available on the carrier board Active Low 3 3V...
Страница 33: ...nal 3 3V_S electrical level The second Gigabit Ethernet interface is optional factory configuration and can be implemented by using a Texas Instruments Gigabit Ethernet transceiver interfaced to Xilin...
Страница 34: ...level CARRIER_PWR_ON Power On command to the Carrier Board Output 1 8V_AL electrical level with a 100k pull down resistor CARRIER_STBY Stand By command to the Carrier Board Output 1 8V_ALW electrical...
Страница 35: ...ignal 1 8V_S electrical level DP1_AUX_SEL General Purpose Signal 1 8V_S electrical level eDP0_HPD General Purpose Signal 3 3V_S electrical level eDP1_HPD General Purpose Signal 3 3V_S electrical level...
Страница 36: ...unctionality which cannot be changed Please be aware that SECO cannot support the users on applications different from SMARC standard SMARC Pin SMARC I F ZU Pin ZU Bank ZU I F ZU bank level I O standa...
Страница 37: ...NA P74 USB3_EN_OC AF11 44 USB3_EN_OC 3 3V LVCMOS P76 USB4_EN_OC AH10 44 USB4_EN_OC 3 3V LVCMOS P80 PCIE_C_REFCK D7 66 PCIE_C_REFCLK 1 8V LVCMOS P81 PCIE_C_REFCK D6 66 PCIE_C_REFCLK 1 8V LVCMOS P86 PC...
Страница 38: ...1 8V LVCMOS P118 GPIO10 J10 25 GPIO10 1 8V LVCMOS P119 GPIO11 J11 25 GPIO11 1 8V LVCMOS P121 I2C_PM_CK AB19 500 MIO24_I2C1_SCL 1 8V LVCMOS P122 I2C_PM_DAT AB21 500 MIO25_I2C1_SDA 1 8V LVCMOS P129 SER...
Страница 39: ...CSI0_DATA1_P 1 2V MIPI D PHY 100 Ohm S15 CSI0_RX1 N6 65 CSI0_DATA1_N 1 2V MIPI D PHY 100 Ohm S29 PCIE_D_TX N4 224 MGTHTX_P3 PCI e spec PCI e spec S30 PCIE_D_TX N3 224 MGTHTX_N3 PCI e spec PCI e spec S...
Страница 40: ...K_S_N PCI e spec PCI e spec S87 PCIE_B_RX V2 224 MGTHRX_P1 PCI e spec PCI e spec S88 PCIE_B_RX V1 224 MGTHRX_N1 PCI e spec PCI e spec S90 PCIE_B_TX U4 224 MGTHTX_P1 PCI e spec PCI e spec S91 PCIE_B_TX...
Страница 41: ...Ohm S132 LVDS0_2 A3 66 LVDS0_2 1 8V LVDS 100 Ohm S133 LCD0_VDD_EN AH14 24 LCD0_VDD_EN 1 8V LVCMOS S134 LVDS0_CK D4 66 LVDS0_CK 1 8V LVDS 100 Ohm S135 LVDS0_CK C4 66 LVDS0_CK 1 8V LVDS 100 Ohm S137 LV...
Страница 42: ...SM B71 SM B71 User Manual Rev First Edition 1 0 Last Edition 1 1 Authors S B Reviewed by C M Copyright 2020 SECO S p A 42 Thermal Design...
Страница 43: ...em but should be used only as a supplemental means of transferring heat to another dissipation system i e heat sinks fans heat pipes etc It is the customer s responsibility to design and apply an appl...
Страница 44: ...M B71 User Manual Rev First Edition 1 0 Last Edition 1 1 Authors S B Reviewed by C M Copyright 2020 SECO S p A 44 SECO S p A Via A Grandi 20 52100 Arezzo ITALY Ph 39 0575 26979 Fax 39 0575 350210 www...
