Schweitzer Engineering SEL-351P, Быстрый старт

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Date Code 990215 Close and Reclose Logic 6-25
SEL-351P Manual Técnico
reset timing is stopped and does not begin timing again until 79BRS deasserts to:
79BRS = logical 0
When reset timing starts again, the reset timer is fully loaded. Thus, successful reset timing has
to be continuous. Use the RSTMN Relay Word bit to monitor reset timing (see
Monitoring
Open Interval and Reset Timing earlier in this subsection).
Example 1
The block reset timing setting is:
79BRS = (51P + 51G) * 79CY
Relay Word bit 79CY corresponds to the Reclose Cycle State. The reclosing relay is in one of
the three reclosing relay states at any one time (see Figure SECTION 6: .5 and Table SECTION
6: .1).
When the relay is in the Reset or Lockout States, Relay Word bit 79CY is deasserted to logical 0.
Thus, the 79BRS setting has no effect when the relay is in the Reset or Lockout States. When a
circuit breaker is closed from lockout, there could be cold load inrush current that momentarily
picks up a time-overcurrent element [e.g., phase time-overcurrent element 51PT pickup (51P)
asserts momentarily]. But, this assertion of pickup 51P has no effect on reset timing because the
relay is in the Lockout State (79CY = logical 0). The relay will time immediately on reset time
79RSLD and take the relay from the Lockout State to the Reset State with no additional delay
because 79BRS is deasserted to logical 0.
When the relay is in the Reclose Cycle State, Relay Word bit 79CY is asserted to logical 1.
Thus, the factory 79BRS setting can function to block reset timing if time-overcurrent pickup
51P or 51G is picked up while the relay is in the Reclose Cycle State. This helps prevent
repetitive "trip-reclose" cycling.
Sequence Coordination Setting (79SEQ)
Sequence coordination keeps the SEL-351P in step with a downstream recloser control (another
SEL-351P or otherwise; see Figure 6.8). Sequence coordination prevents overreaching
SEL-351P fast curves from tripping for faults beyond the downstream recloser control. This is
accomplished by incrementing the shot counter and controlling fast curves with resultant shot
counter elements.
Refer to Figure SECTION 6: .8. In order for the sequence coordination logic in SEL-351P (1) to
increment the shot counter by one count to keep in step with the operation of downstream
SEL-351P (2), all the following have to occur in SEL-351P (1):
•
No trip present (Relay Word bit TRIP = logical 0)
•
Recloser closed (Relay Word bit 52A = logical 1)
•
Sequence coordination SEL
OGIC
setting 79SEQ asserts to logical 1 for at least 1.25
cycles and then deasserts to logical 0
Every time the sequence coordination logic increments the shot counter (e.g., from 0 to 1), the
reset timer is loaded up with reset time 79RSD (EZ setting Reset time for auto reclose). The