Saia-Burgess Controls AG
User Manual PCD2.M4x60 │
Document 27-648
│ Edition ENG06 │ 2020-10-21
Usage as CPU onboard Counter
Interrupts
10-5
10
10.3.2.3 Counter Mode Description
The Counter Mode is confugured in the IO-Configuration (On Board IO’s Inputs /
Interrupts / Counter / Watchdog )
X1 Encoding
In this mode, the counter is set on every positive edge of A and counts up or down
depending on the B state.
X2 Encoding
The same behavior holds for X2 encoding except the counter increments or decre
-
ments on each edge of channel A, depending on which channel leads the other.
Each cycle results in two increments or decrements, as shown in Figure.
X4 Encoding
The counter increments or decrements similarly on each edge of channels A and
B for X4 encoding. Whether the counter increments or decrements depends on
which channel leads the other. Each cycle results in four increments or decre
-
ments, as shown in Figure.
