COMe-cVR6 – User Guide Rev. 1.5
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7.2.1.
SPI Boot
The COMe-cVR6 supports boot from an external SPI Flash. Pin A34 (BIOS_DIS0#) and pin B88 (BIOS_DIS1#) configure
the SPI Flash as follows:
Table 60: SPI Boot Pin Configuration
Configuration BIOS_DIS0#
BIOS_DIS1#
Function
1
open
open
Boot on module BIOS
2
GND
open
Not supported
3
open
GND
Boot on baseboard SPI
4
GND
GND
Not supported
BIOS does not support being split between two chips. Booting takes place either from the
module SPI or from the baseboard SPI.
Table 61: Supported SPI Boot Flash Types for 8-SOIC Package
Size
Manufacturer
Part Number
Device ID
8 MB
Macronix
MX25L6406E
0x20
7.3.
Fast I2C
Fast I2C supports transfer between components on the same board. The COMe-cVR6 features an onboard I2C
controller connected to the LPC Bus.
The I2C controller supports:
Multimaster transfers
Clock stretching
Collision detection
Interruption on completion of an operation
7.4.
UART
The UART implements an interface for serial communications and supports up to two serial RX/TX ports defined in
the COM Express® specification on pins A98 (SERO_TX) /A99 (SERO_RX) for UART0 and pins A101 (SER1_TX)/A102
(SER1_RX) for UART1. The UART controller is fully 16550A compatible.
Features of the UART are:
On-Chip bit rate ( baud rate) generator
No handshake lines
Interrupt function to the host
FIFO buffer for incoming and outgoing data
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