Self-Test Report
RAM
The RAM selftest verifies proper operation of the read/write memory. This test periodi
cally performs a nondestructive write/read to successive blocks of RAM to determine
whether a RAM failure has occurred. A failure occurs if the expected data are not read
back from the RAM. In this case, protection is disabled and “fail” is reported.
Flash
The Flash selftest verifies the integrity of the data contained in system program Flash. If
Flash is corrupted, protection is disabled and “fail” is reported.
CR-RAM
Areas of RAM containing constant data that have been copied from EEPROM are periodi
cally examined to verify their integrity. If this critical RAM has been corrupted, protection
is disabled and “fail” is reported.
EEPROM
The EEPROM selftest verifies the integrity of data contained in EEPROM. EEPROM self
test failures are handled differently because selftest failures and control settings are both
stored in EEPROM. Following an EEPROM selftest failure, factorydefault settings are
restored and protection is enabled. The message “Relay enabled using default settings” is
displayed at the top of each menu. If the EEPROM failure persists (i.e., if default settings
cannot be stored in EEPROM), a selftest failure is also generated.
Voltage Control
This logic monitors the power shunt circuitry in the power supply. On power up, each
phase magnitude is averaged for 0.5 seconds. If the average is greater than or equal to 50
amperes and the associated trip capacitor is not charged, the CT power circuit is defec
tive and a failure is declared.
Self-Test Failures
and Warnings
The following screen is an example of a selftest screen. The +5volt power supply voltage
is flagged with an “F”, and “Relay Disabled” appears above each menu.
The control records selftest failures in EEPROM and remains disabled until power
is removed and restored. When power is restored, the selftest is repeated. If no failure
occurs, the failure indication changes to “warn”—or “W” in the case of a power sup ply—
and protection is enabled.
INTERRUPTER 1
FID=S&C–1000 –R100 –970317
SELF TESTS
W = Warn F = Fail
Pole #
1
2
3
Trip Caps
OK
OK
OK
Supply
+ 5V + 12V
Voltage
5.35F 12.12
RAM
FLASH
CR_RAM
EEPROM
V_CONTROL
OK
OK
OK
OK
OK
Press <ENTER> for menu
18 S&C Instruction Sheet 695-515
Содержание Vista SD
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