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Schematic Diagrams
Samsung Electronics
8-5
This Document can not be used without Samsung’s authorization
Open : Boot From ROM
Short : Boot From DCU
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27MHz
PWMOUT0
TMS
TRIGGER_IN
SYSTEM_RST
TRIGGER_OU
T
/TRST
SMI_ DATA7
TDI
CPU_DATA15
CPU_DATA14
CPU_ADR13
SMI_ DATA9
SMI_ DATA3
SMI_ADR4
TMS
CPU_DATA7
CPU_ADR19
CPU_DATA4
SMI_ DATA1
SMI_ DATA6
CPU_DATA10
CPU_DATA8
SMI_ DATA15
SMI_ DATA12
SMI_ DATA8
SMI_ADR0
CPU_DATA11
TDI
SMI_ DATA13
CPU_DATA12
CPU_ADR18
CPU_ADR9
SMI_ DATA2
TDO
CPU_DATA3
SMI_ADR12
SMI_ADR9
SMI_ADR6
CPU_ADR12
CPU_ADR10
CPU_ADR4
CPU_ADR3
SMI_ADR11
CPU_ADR16
BOOTFROMROM
SMI_ADR10
CPU_ADR17
CPU_ADR11
CPU_ADR6
SMI_ DATA5
SMI_ DATA1
SMI_ADR5
SMI_ADR3
SMI_ADR2
CPU_ADR2
27MHz
SMI_ADR8
/TRST
CPU_DATA9
CPU_DATA2
CPU_DATA0
SMI_ DATA11
SMI_ DATA4
TCK
CPU_ADR8
CPU_ADR7
TCK
SMI_ADR13
SMI_ADR7
CPU_ADR21
CPU_ADR5
SYSTEM_RST
CPU_DATA13
CPU_DATA5
TDO
SMI_ DATA14
CPU_ADR20
CPU_ADR15
SMI_ADR1
SMI_ DATA0
CPU_DATA6
CPU_DATA1
CPU_ADR14
TRIGGER_IN
TRIGGER_OUT
CPU_ADR1
3V3
CPU_2.5
CPU_3V3
5V
CPU_2.5
3V3
3V3
CPU_2.5
3V3
5V
CPU_2.5
CPU_3V3
3V3
3V3
DGND
DGND
DGND
DGND
5V
5V
3V3
R148
NC(33)
R120
2.7K
U103
DS1813-15
2
3
1
VCC
GND
RST
RN105
4
3
2
1
8
7
6
5
C125
RN106
A10K
A10K
4
3
2
1
8
7
6
5
C120
C108
EC101
100uF/16V
C124
10 4
C119
R136
10 K
TP107
R162
C107
JR101
TSW
RN102A33
4
3
2
1
8
7
6
5
C132
104
R104
68K
R103 10 0K
R107 10 0K
RN103A33
4
3
2
1
8
7
6
5
C130
22nF
EC102
470uF/10V
C129
47pF
C116
82pF
C103
R106
2.2M
C101
104
X101
27MHz
BD101
BEED
VD102
1SV215
R135
10 K
C106
U102
74VHC04
1
2
3
4
5
6
7
8
9
10
11
12
13
14
I1
O1
I2
O2
I3
O3
GND
O4
I4
O5
I5
O6
I6
VCC
TP108
R108
56
TP101
TP113
R105
56
TP102
J102
CON20A(BOX HEADER)
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
R124
R126
75
R127
75
TP109
U104
74HC14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
I1
O1
I2
O2
I3
O3
GND
O4
I4
O5
I5
O6
I6
VCC
R141
33
R125
C102
TP11
6
R133
NC
R128
75
TP111
R138
9.1K(1%)
R129
TP110
R122
R121
10K
10K
10K
10K
10K
10K
C121
R123
R132
10K
C122
R163
NC
R164
NC
R134
NC
C123
TP104
R111
100
100
100
100
U101
STi5518MVC
51
52
53
54
55
124
120
186
6
27
26
25
28
29
23
24
32
33
34
138
131
130
128
129
139
140
135
161
162
163
164
165
166
167
168
169
170
173
174
175
176
177
178
179
180
181
182
183
141
142
143
144
145
146
147
148
151
152
153
154
155
156
157
158
69
84
74
75
76
77
80
79
82
95
78
35
36
30
31
4
5
47
81
107
136
159
184
14
37
64
94
119
149
171
198
15
38
50
65
83
96
108
121
137
150
160
172
185
199
56
57
48
49
122
123
187
188
189
190
191
192
193
194
195
196
197
200
201
202
203
204
205
206
207
208
1
2
3
7
8
9
10
11
12
13
39
40
41
42
43
44
45
46
20
21
22
103
104
105
127
126
125
116
115
114
109
110
111
112
113
16
17
18
19
134
133
132
118
117
68
67
66
58
59
60
61
62
63
70
71
72
73
85
86
87
88
89
90
91
92
93
97
98
99
100
101
102
106
DAC_SCLK
DAC_PCMOUT0
DAC_PCMOUT1
DAC_PCMOUT2
DAC_PCMCLK
RESET
PIX_CLK
PIO0(0)_OR_SC0DATA
PIO3(0)
R_OUT
G_OUT
B_OUT
V_REF_RGB
I_REF_RGB
VDDA_RGB_2.5V
VSSA_RGB
Y_OUT
C_OUT
CV_OUT
CPU_RAS1(SDCS1)
CPU_WAIT
CPU_RW_OR_NOTSDRAMWE
CPU_BE(0)_OR_DQM(0)
CPU_BE(1)_OR_DQM(1)
CPU_CAS0_OR_ADR(22)
CPU_CAS1(SDCS0)
CPU_CE(0)
ADR(1)
ADR(2)
ADR(3)
ADR(4)
ADR(5)
ADR(6)
ADR(7)
ADR(8)
ADR(9)
ADR(10)
ADR(11)
ADR(12)
ADR(13)
ADR(14)
ADR(15)
ADR(16)
ADR(17)
ADR(18)
ADR(19)
ADR(20)
ADR(21)
DATA(0)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(5)
DATA(6)
DATA(7)
DATA(8)
DATA(9)
DATA(10)
DATA(11)
DATA(12)
DATA(13)
DATA(14)
DATA(15)
SMI_ADR[0]
SMI_DATA[0]
SMI_CS[0]
SMI_CS[1]
SMI_RAS
SMI_CAS
SMI_DQMU
SMI_DQML
SMI_CLKIN
SMI_CLKOUT
SMI_WE
V_REF_YCC
I_REF_YCC
VDDA_YCC_2.5V
VSSA_YCC
VDD3_3
VSS
VDD3_3
VDD3_3
VDD3_3
VDD3_3
VDD3_3
VDD3_3
VDD2_5
VDD2_5
VDD2_5
VDD2_5
VDD2_5
VDD2_5
VDD2_5
VDD2_5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DAC_LRCLK
SPDIF_OUT
VDD_PCM
VSS_PCM
VDD_PLL
VSS_PLL
PIO0(1)_OR_ATAPIRD
PIO0(2)_OR_ATAPIWR
PIO0(3)_OR_SC0CLOCK
PIO0(4)_OR_SC0RST
PIO0(5)_SC0CMDVCC
PIO0(6)_OR_SC0DATADIR
PIO0(7)_OR_SC0DETECT
PIO1(0)_OR_SSC0DATA
PIO1(1)_OR_SSC0CLK
PIO1(2)
PIO1(3)_OR_UART2TXD
PIO1(4)_OR_UART2RXD
PIO1(5)_OR_UART1TXD
TRIGGER_IN_OR_CPUANAL
TRIGGER_OUT_OR_ERROROUT
PIO2(0)_OR_SC1DATA
PIO2(1)_OR_UART1RXD
PIO2(2)
PIO2(3)_OR_SC1CLOCK
PIO2(4)_OR_SC1RST
PIO2(5)_OR_SC1CMDVCC
PIO2(6)_OR_SC1DATADIR
PIO2(7)_OR_SC1DETECT
PIO3(1)
PIO3(2)
PIO3(3)
PIO3(4)_OR_UART1RTS
PIO3(5)_OR_UART2RTS
PIO3(6)_OR_UART1CTS
PIO3(7)_OR_UART2CTS
PIO4(0)_OR_YC0
PIO4(1)_OR_YC1
PIO4(2)_OR_YC2
PIO4(3)_OR_YC3
PIO4(4)_OR_YC4
PIO4(5)_OR_YC5
PIO4(6)_OR_YC6
PIO4(7)_OR_YC7
PIO5(0)_OR_SSC1DATA
PIO5(1)_OR_SSC1CLK
PIO5(2)
PIO5(3)
PIO5(4)
PIO5(5)
IRQ(0)_OR_SERVOIRQ
IRQ(1)_OR_ATAPIIRQ
IRQ(2)_OR_MDIRQ
PWM0_OR_HSYNC
PWM1_OR_BOOTFROMROM
PWM2_OR_VSYNC
TRST
TMS
TDO
TDI
TCK
F_DATA
F_B_CLK
F_P_CLK_OR_D_VALID(DVD)
F_ERR_OR_P_START(DVD)
CPU_CE(1)
CPU_CE(2)
CPU_CE(3)
CPU_PROCLK
CPU_OE
SMI_ADR[1]
SMI_ADR[2]
SMI_ADR[3]
SMI_ADR[4]
SMI_ADR[5]
SMI_ADR[6]
SMI_ADR[7]
SMI_ADR[8]
SMI_ADR[9]
SMI_ADR[10]
SMI_ADR[11]
SMI_ADR[12]
SMI_ADR[13]
SMI_DATA[1]
SMI_DATA[2]
SMI_DATA[3]
SMI_DATA[4]
SMI_DATA[5]
SMI_DATA[6]
SMI_DATA[7]
SMI_DATA[8]
SMI_DATA[9]
SMI_DATA[10]
SMI_DATA[11]
SMI_DATA[12]
SMI_DATA[13]
SMI_DATA[14]
SMI_DATA[15]
Auxiliary Clock
RN108
A33
4
3
2
1
8
7
6
5
RN107A33
4
3
2
1
8
7
6
5
R112
C127
TP103
R117
33
TP105
C114
R114
R149
33
R109
1K
TP115
R140
9.1K(1%)
R161
10K
10K
VD101
1SV215
R115
C126
R145
NC(33)
C104
R150
33
C115
NC
R146
NC(33)
RN104
33
4
3
2
1
8
7
6
5
R130
4.7K
R144
NC(56)
R151
33
R139
1K
J101
CON2
1
2
D101
S3J
R160
10 K
R118
33
R116
NC
C117
104
104
104
104
104
104
104
3V3
104
104
104
104
104
104
104
104
104
104
104
104
R131
4.7K
R142
0
C105
C133
10 2
R152
33
R119
2.7K
C118
C128
TP112
C131
NC
R147
NC(33)
R101
10K
R143
100
R102
0
R113
33
SMI _DQML
[3]
PCMCLK
[4]
CV_OUT
[4]
CPU_CE3
[3]
DAC_LRCLK
[4]
Y_OUT
[4]
SMI_RA S [3]
CPU_DATA[0..15]
[1,3,7]
CH_RST
DAC_PCMOUT0
[4]
SMI_DATA[0..15]
[3]
SMI_DQ MU [3]
SMI_WE
[3]
DAC_SCLK
[4]
/RST
[3]
G_ OUT
[4]
SPDIF_OUT
[4]
SMI_CLKOUT
[3]
SMI_CS 0 [3]
SMI_ADR[0..13]
[3]
CPU_ADR[1..21]
[1,3,7]
CPU_BE1
[3,7]
C_OUT
[4]
B_OUT
[4]
SMI_CA S [3]
CPU_OE
[3,7]
CH_POLARITY
R_OUT
[4]
CPU_BE0
[3,7]
CPU_CAS1
[3]
CPU_WAIT
[1]
CPU_CE2
[7]
CPU_RW
[1,3,7]
CPU_CAS0
[3]
CPU_RAS0
[3]
CPU_PROCLK
[3]
FRONT_CLK
DIN
DOUT
V_27
[7]
CI_Vcc_En1
[7]
SC1_CLK
[5]
I/O2UC
[5]
I/O1UC
[5]
RS_RXD
[5]
CI_PROTECTION
[7]
LNB_ONOFF
CI_CAReset
[7]
IIC_CLK
[3,4,5,7]
CTRL_RF
CI_Vcc_En0
[7]
SC2_CLK
[5]
RS_TXD
[5]
IIC_DATA
[3,4,5,7]
CH_22K_ONOFF
[2]
STB
SC_IRQ
[5]
CH_I2C_CLK
[2]
BOOTFROMROM
CI_INT
[7]
CH_I2C_DATA
[2]
PWMOUT0
IT_OUT
[4]
RCU_D
[5]
ATAPI_INT
[1]
AT_RD
[1]
AT_WR
[1]
AT_RST
AT_CE
[1]
RCU_D
MO_VAL
[7]
CH_ERROR
[2]
MO _CLK
[7]
MO0
[7]
NIM_DATA
[2]
NIM_VALID
[2]
CH_ERROR
[2]
NIM_BLK OUT
[2]
PCM1742K_ML
PCM1742K_MC
PCM1742K_MD
/RST
FLASH_RST
SYSTEM_RST
A_MUTE
8-4 CPU
Содержание DTB-D700F
Страница 23: ...Software Upgrade and Installation 3 2 Samsung Electronics MEMO ...
Страница 33: ...Troubleshooting 4 10 Samsung Electronics MEMO ...
Страница 35: ...Exploded View and Parts List 5 2 Samsung Electronics MEMO ...
Страница 40: ...Samsung Electronics 7 1 7 PCB Diagrams 7 1 Main 7 2 7 2 S M P S 7 4 7 3 Key 7 6 ...
Страница 41: ...PCB Diagrams 7 2 Samsung Electronics 7 1 Main COMPONENT SIDE ...
Страница 42: ...PCB Diagrams Samsung Electronics 7 3 CONDUCTOR SIDE ...
Страница 43: ...PCB Diagrams 7 4 Samsung Electronics 7 2 S M P S COMPONENT SIDE ...
Страница 44: ...PCB Diagrams Samsung Electronics 7 5 CONDUCTOR SIDE ...
Страница 45: ...PCB Diagrams 7 6 Samsung Electronics 7 3 Key COMPONENT SIDE CONDUCTOR SIDE ...
Страница 57: ...Schematic Diagrams 8 12 Samsung Electronics This Document can not be used without Samsung s authorization MEMO ...