6
Specifications
Module Safety Integrity Level:
SIL-2 (SIL-3 in redundant configuration)
Card Address:
Determined by software configuration
Watchdog Timers:
Fixed:
600 ms maximum
Windowed:
3 ms minimum, 80 ms maximum
Host Network Compatibility:
1 GB TX full-duplex with auto-negotiation
I/O Network Compatibility:
1 GB TX full-duplex with auto-negotiation
Ethernet Cable Length:
328 feet (100 meters) maximum, card to switch or card to card
Ethernet Cable Type:
STP Category 5 (EIA 568B, Cat 5) shielded Ethernet cables with 4
twisted-pair wires and RJ-45 tips
Program Memory:
Up to 4096512 bytes for PGM files
Up to 1500000 bytes for UDL files
Data Memory Type:
SDRAM
Program Memory Type:
IDE Disk Chip
Power Requirements:
+5 VDC @ 1.75 Amps
Battery:
Processor contains a lithium battery (see Figure 2) that powers the
time-of-day clock whenever power to chassis is turned off. The
expected life span of this battery is five (5) years. Replace this
battery (see Figure 2) only with an agency-approved battery of the
same voltage and capacity (3V, 180 mAh). Two recommended
replacements are:
Panasonic part number BR 2032
Varta part number CR 2032
WARNING!
If you replace the battery with an incorrect type, it may
explode.
Do not
dispose of batteries in the trash. Dispose of batteries
according to local regulations.
Please recycle according to local regulations.
Programming Tools:
NetArrays Developer Studio
Programming Languages:
Flow Charts, Objects, Structured Text, C/C++, Fuzzy Logic
Processor Utilization:
Processor can be configured for cyclic execution: 5 ms, 10 ms, 15 ms,
20 ms or 25 ms. Processor utilization is measured via Node Info
Object, which reports the reserve time in each execution cycle.
Minimum 1 ms reserve time is recommended.
Processing of I/O:
The 3000/06 Node Processor communicates each scan cycle with
3000/01 Chassis Processor. Inputs from the modules are acquired by
the 3000/01 Chassis Processor, transferred to the 3000/06 Node
Processor and are processed in the user application program after
two scan cycles. Computational results of the user application
program are sent back to the 3000/01 Chassis Processor to activate
the output modules.
