RTD Embedded Technologies, Inc.
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SYNC25104HR/
SYNC35104HR
User’s Manual
5
Functional Description
5.1
Block Diagram
The Figure below shows the functional block diagram of the SYNC35104HR. The various parts of the block diagram are discussed in the
following sections.
Figure 8: SYNC35104 Block Diagram
5.2
Main Modules
The SYNC35104 connects to the host CPU module via the Universal Serial Bus. A USB hub provides two downstream ports for two devices, a
USB to serial converter and a USB to SPI converter chip. The GPS receiver is interfaced using the serial port, while the SI5395 is interfaced
using the SPI.
5.2.1
GPS
M
ODULE
I
NTERFACE
The host can connect to the u-blox LEA-M8F GNSS receiver module by either using the USB to serial converter or the RS232 interface.
Whenever a byte is transmitted from the USB-serial converter, the TX line of the converter is connected to the GPS module’s RX input.
Otherwise, the module RX is connected to the RS232 TX. The module TX signal is permanently connected to both ports, therefore the data can
be received on both. 1 PPS signal is available on the RI pin of the USB to serial converter and the RI, DCD, and DSR pins of the RS232. Due
to the nature of the USB protocol, interrupts caused by the 1 pps signal can have significant jitter and latency from the USB, therefore use of
the RS232 for timing purposes is highly recommended. The default configuration for the serial ports are:
•
9600 Baud
•
8 Data bits
•
No parity
•
1 Stop bit
•
No Flow Control
USB hub
PC
Ie B
us
USB to SPI
GPS
Module
CN7: GPS Ant
USB 2.0
1PPS LED
CN13: Serial
CN6: Any
freq.
USB to
serial
serial to
RS232
CN9: 1PPS
CN5:
SyncBus
SI5395
CN10, CN11:
Any freq.
DAC
OCXO
CN12: 10MHz
2
30.
72
M
Hz