
RTD Embedded Technologies, Inc.
|
www.rtd.com
24
SYNC25104HR/
SYNC35104HR
User’s Manual
Table 11: SI5395 outputs
Output Destination
Output standard
OUT7 CN11
LVCMOS 3.3V
OUT8 not connected
OUT9 not connected
OUT9A connected to IN3/FB_IN
Each LVCMOS driver has a configurable output impedance to accommodate different trace impedances. The chip is powered from 3.3V and
there is a 22Ω resistor in series with each single ended output of the chip. The resulting output impedances are 38+22=
6
0Ω, 30+22=52Ω and
22+22=44Ω. For best performance
52Ω setting is recommended. For details refer
p. 21 section 4.9.6.
Out 9A is connected to IN3/FB_IN which is an external feedback path. By using this feature, it is possible to generate signals that have well
defined phase relationship with the input reference signal. Otherwise, the initial phase of the output signals relative to the input signal will be
random (obviously when the PLL is locked the phase difference will be constant, but random).