rtd FPGA35S6 Series Скачать руководство пользователя страница 27

Страница: 27 / 37

RTD Embedded Technologies, Inc.

www.rtd.com

FPGA35S6046/FPGA35S6101 User’s Manual

This is the register address space for the example FPGA that is given with the FPGA35S6.

6.1

Identifying the Board

The FPGA35S6 Example shows up in standard PCI Configuration space as a PCI device. It can be positively identified as shown in the Table
below.

Table 20: Identifying the FPGA35S6

Configuration
Space Offset

Register Description

Value

0x00

Vendor ID

0x1435

0x02

Device ID

0x5800

6.2

BAR0

–

FPGA Example Register Map

Table 21: FPGA Example Register Map

Offset

0x03

0x02

0x01

0x00

0x00

R_ID

0x04

R_STATUS

0x08

R_EEPROM

0x0C

R_USER_ID

0x20

R_PORT1_IN

0x24

R_PORT1_OUT

0x28

R_PORT1_DIR

0x30

R_PORT2L_IN

0x34

R_PORT2L_OUT

0x38

R_PORT2L_DIR

0x40

R_PORT2H_IN

0x44

R_PORT2H_OUT

0x48

R_PORT2H_DIR

0x50

R_DDR_RD_DATA

0x54

R_DDR_WR_DATA

0x58

R_DDR_ADDR

0x5C

R_DDR_STATUS

0x60

R_CLK_27_1

0x64

R_CLK_27_2

0x70

R_COM1_OUT

0x74

R_COM1_IN

0x78

R_COM2_OUT

0x7C

R_COM2_IN

0x80

R_COM3_OUT

0x84

R_COM3_IN

0x88

R_COM4_OUT

0x8C

R_COM4_IN

6.2.1

R_ID

EAD

)

This is a register that identifies the board.

0x12345678 is the identification of the example code

Содержание FPGA35S6 Series

Страница 1: ...RTD Embedded Technologies Inc AS9100 and ISO 9001 Certified FPGA35S6046HR FPGA35S6101HR FPGA Module User s Manual BDM 610010048 Rev D...

Страница 2: ...RTD Embedded Technologies Inc 103 Innovation Boulevard State College PA 16803 USA Telephone 814 234 8087 Fax 814 234 5218 www rtd com sales rtd com techsupport rtd com...

Страница 3: ...me Devices Inc PS 2 is a trademark of International Business Machines Inc PCI PCI Express and PCIe are trademarks of PCI SIG PC 104 PC 104 Plus PCI 104 PCIe 104 PCI 104 Express and 104 are trademarks...

Страница 4: ...Transceiver Connectors 14 3 3 2 Bus Connectors 15 CN1 Top CN2 Bottom PCIe Connector 15 3 3 3 Jumpers 15 JP4 JP5 JP6 Pull up Pull down Jumper 15 JP1 Embedded Programmer Enable 15 JP8 User ID Jumper 15...

Страница 5: ..._PORT2L_OUT Write 28 6 2 10 R_PORT2L_DIR Read Write 28 6 2 11 R_PORT2H_IN Read 28 6 2 12 R_PORT2H_OUT Write 28 6 2 13 R_PORT2H_DIR Read Write 29 6 2 14 R_DDR_RD_DATA Read 29 6 2 15 R_DDR_WR_DATA Read...

Страница 6: ...cs 10 Table 4 CN3 Programming Header 12 Table 5 CN8 I O Pin Assignments 13 Table 6 CN9 I O Pin Assignments 14 Table 7 CN10 CN11 CN12 CN13 I O Pin Assignments 14 Table 8 Pull up Pull down Jumper option...

Страница 7: ...t block for PCI Express o Integrated Memory Controller 1 Gb of DDR2 SDRAM Supports access rates of up to 800Mb s o Dedicated carry logic for high speed arithmetic o Abundant logic resources with incre...

Страница 8: ...nual o Compatible with Xilinx tools including iMpact and ChipScope PCI Express Bus o PCIe 104 Universal Board Interfaces with Type 1 or Type 2 bus No re population o Provides 2 5 Gbps in each directio...

Страница 9: ...act RTD Embedded Technologies for more information on custom FPGA35S6 products and custom FPGA designs The Intelligent Data Acquisition Node IDAN building block can be used in just about any combinati...

Страница 10: ...Detect Threshold 65 175 mV Serial Transceivers VIH Input High Voltage RS 232 mode 2 0 1 5 15 V VIL Input Low Voltage RS 232 mode 15 1 2 0 6 V VOH Output High Voltage RS 232 mode 5 0 5 5 7 0 V VOL Out...

Страница 11: ...until you are ready to install it into your system When removing it from the bag hold the board at the edges and do not touch the components or connectors Handle the board in an antistatic environmen...

Страница 12: ...nt for CN3 is shown below This connector header mates with the Xilinx OEM programming cable Table 4 CN3 Programming Header 3 3V VRef 2 1 GND TMS 4 3 GND TCK 6 5 GND TDO 8 7 GND TDI 10 9 GND N C 12 11...

Страница 13: ...and LVDS_33 input LVDS output is not supported in Bank 1 Table 5 CN8 I O Pin Assignments Port2_n 0 2 1 Port2_p 0 Port2_n 1 4 3 Port2_p 1 Port2_n 2 6 5 Port2_p 2 Port2_n 3 8 7 Port2_p 3 GND 10 9 GND Po...

Страница 14: ...4 23 port1_n 5 GND 26 25 port1_p 6 GND 28 27 port1_n 6 GND 30 29 port1_p 7 GND 32 31 port1_n 7 JP6 GND 34 33 port1_p 8 GND 36 35 port1_n 8 GND 38 37 port1_p 9 GND 40 39 port1_n 9 GND 42 41 port1_p 10...

Страница 15: ...O is pulled down to GND No Jumper I O has no pull up pull down JP1 Embedded Programmer Enable This jumper is used to enable the embedded programmer to the JTAG chain See Section 5 8 on page 26 for mo...

Страница 16: ...are properly positioned 6 Check the stacking order make sure all of the busses used by the peripheral cards are connected to the cpuModule 7 Hold the module by its edges and orient it so the bus conne...

Страница 17: ...t into your system When removing it from the bag hold the module by the aluminum enclosure and do not touch the components or connectors Handle the module in an antistatic environment and use a ground...

Страница 18: ...m1_txd CN10 5 22 com1_cts CN10 6 4 com1_dtr CN10 7 23 com1_ri CN10 8 5 GND CN10 9 24 com2_dcd CN11 1 6 com2_dsr CN11 2 25 com2_rxd CN11 3 7 com2_rtd CN11 4 26 com2_txd CN11 5 8 com2_cts CN11 6 27 com2...

Страница 19: ...n Signal Pull Jmpr C9 Pin Row 1 Row 2 Row 3 1 port1_p 0 JP4 1 22 GND 2 43 port1_n 0 3 2 GND 4 23 port1_p 1 5 44 GND 6 3 port1_n 1 7 24 GND 8 45 port1_p 2 9 4 GND 10 25 port1_n 2 11 46 GND 12 5 port1_p...

Страница 20: ...in out P4 is attached to Bank 1 and supports any of the Spartan 6 I O Standards that use a 3 3V VCCO and no reference voltage This includes LVTTL LVCMOS33 input and output and LVDS_33 input LVDS outpu...

Страница 21: ...54 Port2_n 14 36 13 Port2_p 15 37 34 Port2_n 15 38 55 GND 39 14 GND 40 35 Port2_p 16 41 56 Port2_n 16 42 15 Port2_p 17 43 36 Port2_n 17 44 57 Port2_p 18 45 16 Port2_n 18 46 37 Port2_p 19 47 58 Port2_...

Страница 22: ...I O is pulled down to GND No Jumper I O has no pull up pull down JP1 Embedded Programmer Enable This jumper is used to enable the embedded programmer to the JTAG chain See Section 5 8 on page 26 for m...

Страница 23: ...by the peripheral cards are connected to the cpuModule 6 Hold the module by its edges and orient it so the bus connector pins line up with the matching connector on the stack 7 Gently and evenly press...

Страница 24: ...ither the Embedded Digilent USB JTAG Programmer or CN3 Xilinx JTAG Programming Header 5 3 Oscillator The FPGA35S6 features a 27Mhz oscillator for clock based operations in the FPGA 5 4 EEPROM The FPGA...

Страница 25: ...Digital I O Circuitry 5 7 RS 232 422 485 Transceivers The RS 232 422 485 transceivers on this board all it to interface with a variety of serial port standards incremental encoders and other devices T...

Страница 26: ...TXD1 enabled 0 TXD1 disabled 1 D1 Transmitting 0 D1 Receiving com _dir2 1 TXD2 enabled 0 TXD2 disabled 1 D2 Transmitting 0 D2 Receiving The other signals that are used to configure the transceivers ar...

Страница 27: ...5 0x02 Device ID 0x5800 6 2 BAR0 FPGA Example Register Map Table 21 FPGA Example Register Map Offset 0x03 0x02 0x01 0x00 0x00 R_ID 0x04 R_STATUS 0x08 R_EEPROM 0x0C R_USER_ID 0x20 R_PORT1_IN 0x24 R_POR...

Страница 28: ...R_PORT1_OUT WRITE This is the output register for the port1 The value to be output direction must be set to output 6 2 7 R_PORT1_DIR READ WRITE This is the direction register for port1 Indicates the d...

Страница 29: ...rt2_ 16 port2_ 19 Indicates the direction of each pin 0 input 1 output 6 2 14 R_DDR_RD_DATA READ Reads the data of the DDR2 SRAM at R_DDR_ADDR location A read is performed by writing address to R_DDR_...

Страница 30: ...4 Write error B5 Write underrun B6 Write empty B7 Write full B 14 8 Read count B 22 16 Write count B 24 Command full B 25 Command empty B 31 Calibration done 6 2 18 R_COM1_OUT READ WRITE This register...

Страница 31: ...com1_ri 6 2 20 R_COM2_OUT READ WRITE This register sets the configuration and outputs of CN11 RS 232 422 485 transceivers B0 com2_txd B1 com2_rts B2 com2_dtr B8 com2_enable B9 com2_mode0 B10 com2_mod...

Страница 32: ...and outputs of CN12 RS 232 422 485 transceivers B0 com3_txd B1 com3_rts B2 com3_dtr B8 com3_enable B9 com3_mode0 B10 com3_mode1 B11 com3_mode2 B12 com3_dir1 B13 com3_dir2 B14 com3_slew B15 com3_term...

Страница 33: ...and outputs of CN13 RS 232 422 485 transceivers B0 com4_txd B1 com4_rts B2 com4_dtr B8 com4_enable B9 com4_mode0 B10 com4_mode1 B11 com4_mode2 B12 com4_dir1 B13 com4_dir2 B14 com4_slew B15 com4_term...

Страница 34: ...the least number of modules in the system possible Swap Components Try replacing parts in the system one at a time with similar parts to determine if a part is faulty or if a type of part is configure...

Страница 35: ...for the PC 104 Embedded Consortium www pc104 org 8 2 PCI and PCI Express Specification A copy of the latest PCI and PCI Express specifications can be found on the webpage for the PCI Special Interest...

Страница 36: ...God or other contingencies beyond the control of RTD Embedded Technologies or as a result of service or modification by anyone other than RTD Embedded Technologies Except as expressly set forth above...

Страница 37: ...ologies Inc 103 Innovation Boulevard State College PA 16803 USA Telephone 814 234 8087 Fax 814 234 5218 www rtd com sales rtd com techsupport rtd com Copyright 2021 by RTD Embedded Technologies Inc Al...

Результаты поиска

Содержание FPGA35S6 Series

Отзывы:

Похожие инструкции для FPGA35S6 Series

Бренды по названию

Популярные бренды

rtd FPGA35S6 Series, Руководство пользователя

Результаты поиска

Содержание FPGA35S6 Series

Отзывы:

Похожие инструкции для FPGA35S6 Series

Бренды по названию

Популярные бренды