rtd cpuModules CMA34CR, Руководство пользователя

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BDM-610000083 Rev L Chapter 4: Using the cpuModule 57
Advanced Digital I/O Ports (aDIO™)
This board supports 12 bits of TTL/CMOS compatible digital I/O (TTL signaling). These I/O lines are grouped
into two ports, Port 0 and Port 1. Port 0 is bit programmable; Port 1 is byte programmable. Port 0 supports RTD’s
Advanced Digital Interrupt modes. The three modes are strobe, match and event. Strobe mode generates an
interrupt and latches Port 0 when the strobe input transitions from low to high. Match mode generates an
interrupt when an 8-bit pattern is received in parallel that matches the match mask register. Event mode
generates an interrupt when a change occurs on any bit. In any mode, masking can be used to monitor selected
lines.
When the CPU boots, all digital I/O lines are programmed as inputs, meaning that the digital I/O line’s initial
state is undetermined. If the digital I/O lines must power up to a known state, an external 10 k-Ohm resistor must
be added to pull the line high or low.
The 8-bit control read/write registers for the digital I/O lines are located from I/O address EC0h to EC3h. These
registers are written to zero upon power up. From EC0h to EC3h, the name of these registers are
Port 0 data ,
Port 1 data , Multi-Function , and DIO-Control register.
Note While the 16-pin aDIO connector is pin-for-pin compatible with previous generations of RTD
cpuModules (such as the Core 2 Duo series), the hardware is slightly different, and requires that writes
and reads to/from the aDIO ports happen no more than once per millisecond. Migrating legacy software
to the CMA34CR that utilizes RTD’s Advanced Digital I/O may require that you add this delay prior to all
reads and writes.
Note RTD provides drivers that support the aDIO interface on popular operating systems. RTD
recommends using these drivers instead of accessing the registers directly.