Rohm BD71837MWV, Руководство по конструкции

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Application Note BD71837MWV Platform Design Guide
© 2018 ROHM Co., Ltd.
No. 61AN002E Rev.001
May.2018
4.2. Pin Configuration
The pin configuration of BD71837MWV is designed and it will result in the effective routings between PMIC and SoC, memory device
and other components.
Figure 4.2 BD71837MWV pin configuration
Note: (*) EXP-PAD is the power GND for PMIC so it should be soldered to GND plane.
(**) EXP-PAD assigned to 4 corners are also the same potentials with (*) EXP-PAD.
LD
O
4
_
F
B
LD
O
4
_
V
O
UT
V
S
Y
S
2
W
D
O
G
_
B
R
T
C
_
R
E
S
E
T
_
B
B
UC
K
8
_
F
B
B
UC
K
8
_
V
IN
B
UC
K
8
_
V
IN
B
UC
K
8
_
LX
B
UC
K
8
_
LX
B
UC
K
7
_
LX
B
UC
K
7
_
V
IN
B
UC
K
7
_
F
B
IR
Q
_
B
PO
R
_
B
C
3
2
K
_
O
UT
D
V
D
D
(*
*
)E
X
P-
PA
D
(*
*
)E
X
P-
PA
D
LD
O
3
_
F
B
V
IN
_
3
P3
LD
O
3
_
V
O
UT
V
S
Y
S
3
B
UC
K
4
_
F
B
B
UC
K
4
_
V
IN
B
UC
K
4
_
LX
B
UC
K
3
_
LX
B
UC
K
3
_
LX
B
UC
K
3
_
V
IN
B
UC
K
3
_
F
B
A
G
N
D
IN
T
LD
O
1
P5
LD
O
7
_
V
O
UT
V
S
Y
S
1
X
IN
X
O
UT
45 44 43 42 41 40 51 50 49 48 47 46
SDA
33 SCL
32 PMIC_ON_REQ
31 PMIC_STBY_REQ
39 38 37 36 35
34
27 BUCK1_LX
26 BUCK1_LX
25 BUCK2_LX
30 BUCK1_FB
29 BUCK1_VIN
28 BUCK1_VIN
21 BUCK2_FB
20 PWRON_B
19 LDO1_VOUT
24 BUCK2_LX
23 BUCK2_VIN
22 BUCK2_VIN
18 LDO2_VOUT
1 2 3 4 5 6 7 8 15 16 17 11 12 13 14
55
9 10
56 BUCK6_VIN
57 BUCK6_VIN
58 BUCK6_LX
68 LDO5_VOUT
(*)EXP-PAD
(PGND)
1Pin Mark
65 VIN_1P8_2
66 MUXSW_VOUT
BUCK6_FB
(**)EXP-PAD
(**)EXP-PAD
67 MUXSW_VOUT
62 BUCK5_VIN
63 BUCK5_VIN
64 BUCK5_FB
59 BUCK6_LX
60 BUCK5_LX
61 BUCK5_LX
52 VIN_1P8_1
53 LDO6_VOUT
54 SD_VSELECT