Remote Control
R&S
®
ZNA
743
User Manual 1178.6462.02 ─ 12
Bit No.
Meaning
9
INTegrity register summary
This bit is set if a bit is set in the STATus:QUEStionable:INTegrity register and the associ-
ated ENABle bit is set to 1.
10
LIMit register summary
This bit is set if a bit is set in the STATus:QUEStionable:LIMit1 register and the associated
ENABle bit is set to 1.
STATus:QUEStionable:LIMit<1|2>
The
STATus:QUEStionable:LIMit<1|2>
registers indicate the result of the limit
check. They can be queried using the commands
STATus:QUEStionable:LIMit<1|2>:CONDition?
or
STATus:QUEStionable:LIMit<1|2>[:EVENt]?
STATus:QUEStionable:LIMit1
is also the summary register of the lower-level
STATus:QUEStionable:LIMit2
register.
The bits in the
STATus:QUEStionable:LIMit1
register are defined as follows:
Bit No.
Meaning
0
LIMit2 register summary
This bit is set if a bit is set in the STATus:QUEStionable:LIMit2 register and the associated
ENABle bit is set to 1.
1
Failed limit check for trace no. 1
This bit is set if any point on trace no. 1 fails the limit check.
...
...
14
Failed limit check for trace no. 14
This bit is set if any point on trace no. 14 fails the limit check.
The bits in the
STATus:QUEStionable:LIMit2
register are defined as follows:
Bit No.
Meaning
0
Not used
1
Failed Limit Check for Trace no. 15
This bit is set if any point on trace no. 15 fails the limit check.
2
Failed Limit Check for Trace no. 16
This bit is set if any point on trace no. 16 fails the limit check.
Numbering of traces
The traces numbers 1 to 16 are assigned as follows:
●
Traces assigned to channels with smaller channel numbers have smaller trace
numbers.
●
Within a channel, the order of traces reflects their creation time: The oldest trace
has the smallest, the newest trace has the largest trace number. This is equivalent
Status Reporting System
