Publication 1747-UM013B-EN-P - January 2005
D-30
Block Transfer Examples for Earlier Processors
Rung 2:7
WHEN A BTW SUCCESSFULLY OR UNSUCCESSFULLY COMPLETES, UNLATCH THE BTW ENABLE BIT
AND THE BTW PENDING BIT TO COMPLETE A BTW SEQUENCE. ALSO, LATCH THE BIT THAT
CONTINUES CHECKING THE BTW STATUS UNTIL THE SN MODULE TURNS THE DONE/ERROR BIT
OFF. IN ADDITION, BUFFER THE BTW ERROR CODE IN CASE AN ERROR OCCURS.
| |
| |
| VIRTUAL |
| BTW DONE BTW |
| BIT PENDING |
| N7:64 B3 |
|-+----] [-----+--------------------------------------+----(U)---------------+-|
| | 13 | | 1 | |
| | | | | |
| | | | | |
|
| VIRTUAL
|
| VIRTUAL
| |
| |
BTW ERROR | | BTW ENABLE | |
| | BIT | | BIT | |
| | N7:64 | | N7:53 | |
| +----] [-----+ +----(U)---------------+ |
| 12 | 15 | |
| | | |
| | | |
| | | |
| | CHECK BTW | |
| | STATUS | |
| | B3 | |
| +----(L)---------------+ |
| | 3 | |
| | | |
| | | |
| | | |
| | BTW ERROR | |
| | CODE | |
| | +MOV---------------+ | |
| +-+MOVE +-+ |
| |Source M1:1.203| |
| | *| |
| |Dest N7:22| |
| | 0| |
| +------------------+ |
Rung 2:8
THIS RUNG AND THE NEXT RUNG WILL TOGGLE BETWEEN EXECUTING A BTR AND A BTW.
| | | | |
| | | | |
| VIRTUAL |VIRTUAL |VIRTUAL | |
| BTR ENABLE|BTW ENABLE|BTR DONE |BTR ERROR BTR |
| BIT |BIT |BIT |BIT PENDING |
| N7:50 N7:53 N7:60 N7:60 B3 |
|----]/[--------]/[--------]/[--------]/[-----------------------+----(L)-----+-|
| 15 15 13 12 | 0 | |
| | | |
| +++ +++|
| +++ +++|
| | | |
| | | |
| | | |
| | VIRTUAL | |
| | BTR ENABLE | |
| | BIT | |
| | N7:50 | |
| +----(L)-----+ |
| 15 |
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