VC7 PCB Layout Guidelines Manual
R31UH0017EU0100 Rev.1.00
Aug 4, 2022
Page 2
1. Layer Stack-Up
A PCB consists of multiple layers of copper (foil) and isolation materials laminated together. PCB layer stack-up
design refers to the layer arrangement of copper and dielectric material layers with the total number of layers
and the thickness of each layer taking into considerations.
Planning optimal multilayer stack-up is one of the most critical factors in determining electromagnetic
compatibility performance of a PCB. A well-designed layer stack-up can both minimize the radiation and stay
robust from external noise sources.
The following two diagrams illustrate the significance and relationships of signal impedance and EMC control
with the PCB layer stack-up.
A signal trace that is suspended over a ground plane with a dielectric layer between them is call a microstrip. Its
impedance is determined by a number of factors in the PCB and its stack-up arrangement:
■
Signal trace width
■
Thickness of the trace (thickness of copper layer)
■
Distance between the two traces if it is a differential pair
■
Thickness of the dielectric layer between a microstrip and the ground plane under the dielectric layer
■
Dielectric constant Er
The following figure shows the calculation of a differential pair’s impedance on the top layer of a PCB stack-up
[1]
.
Figure 1. Signal Impedance with Respect of PCB Stack-Up
When a signal trace changes layers, the above factors affecting trace impedance change as well. Caution must
be exercised in order to keep the signal impedance continuous to avoid signal integrity impairments.
Another signal type is called a stripline signal, which is one sandwiched between two dielectric material layers. A
stripline signal trace impedance is similarly related to these factors but with a different calculation formula (not
provided).
Figure 2. Stripline Signals Embedded in Dielectric Layer between Two GND Layers