RL78/G14
Recommended PCB Layout for Reducing Noise
R01AN1876EC0100 Rev. 1.00
Page 11 of 14
Feb. 28, 2014
4.4 Test
Conclusions
The test results only show the reducing noise performance of the tested boards. As is shown in Table 4.1, the result of
noise interference test on the recommended board is about 4000 V (the maxim value of test condition), and the
non-recommended one is below 2500 V.
Conclusions from this test are as follows:
•
Higher reducing noise performance can be achieved by designing a PCB layout according to the recommendations.
•
Due to the high reducing noise performance of the MCU, the worst phenomenon (reset can not be released) did not
occur even in the non-recommended board noise test.
Note: Keep the MCU away from high voltage noise, even if it is designed with the recommended PCB layout. The
test results are available only to distinguish the noise effects on different layouts and do not represent the MCU
performance.
